Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Date:   Fri, 4 Feb 2022 16:21:08 -0600
From:   John Allen <john.allen@amd.com>
To:     "H.J. Lu" <hjl.tools@gmail.com>
Cc:     Rick Edgecombe <rick.p.edgecombe@intel.com>,
        the arch/x86 maintainers <x86@kernel.org>,
        "H . Peter Anvin" <hpa@zytor.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>,
        LKML <linux-kernel@vger.kernel.org>,
        "open list:DOCUMENTATION" <linux-doc@vger.kernel.org>,
        Linux-MM <linux-mm@kvack.org>,
        linux-arch <linux-arch@vger.kernel.org>,
        Linux API <linux-api@vger.kernel.org>,
        Arnd Bergmann <arnd@arndb.de>,
        Andy Lutomirski <luto@kernel.org>,
        Balbir Singh <bsingharora@gmail.com>,
        Borislav Petkov <bp@alien8.de>,
        Cyrill Gorcunov <gorcunov@gmail.com>,
        Dave Hansen <dave.hansen@linux.intel.com>,
        Eugene Syromiatnikov <esyr@redhat.com>,
        Florian Weimer <fweimer@redhat.com>,
        Jann Horn <jannh@google.com>, Jonathan Corbet <corbet@lwn.net>,
        Kees Cook <keescook@chromium.org>,
        Mike Kravetz <mike.kravetz@oracle.com>,
        Nadav Amit <nadav.amit@gmail.com>,
        Oleg Nesterov <oleg@redhat.com>, Pavel Machek <pavel@ucw.cz>,
        Peter Zijlstra <peterz@infradead.org>,
        Randy Dunlap <rdunlap@infradead.org>,
        "Ravi V . Shankar" <ravi.v.shankar@intel.com>,
        Dave Martin <Dave.Martin@arm.com>,
        Weijiang Yang <weijiang.yang@intel.com>,
        "Kirill A . Shutemov" <kirill.shutemov@linux.intel.com>,
        joao.moreira@intel.com, Kostya Serebryany <kcc@google.com>,
        Stephane Eranian <eranian@google.com>
Subject: Re: [PATCH 35/35] x86/cpufeatures: Limit shadow stack to Intel CPUs
Message-ID: <Yf2m1ETkcRpk3v+u@dell9853host>
References: <20220130211838.8382-1-rick.p.edgecombe@intel.com>
 <20220130211838.8382-36-rick.p.edgecombe@intel.com>
 <YfxQGRV6axGQ8bBC@dell9853host>
 <CAMe9rOqwby=p3w7L7kgDUhZPzLksYEZcyKLbWOafEYaazWgyBg@mail.gmail.com>
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <CAMe9rOqwby=p3w7L7kgDUhZPzLksYEZcyKLbWOafEYaazWgyBg@mail.gmail.com>
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?EfYcgfhB/dJ1658uvgvBx4ulncrwkdZBnMxBuUdRXUdfgmZQ2KQD3BwDMsDG?=
 =?us-ascii?Q?CTqk0XEKXbGEgsLPNkuXshylB7ETJ25utecq0QPkviAxzdAlEtQg1Exsx5qv?=
 =?us-ascii?Q?WW7kl12xgR/aIx04S74FIJXj7VtwrxeZ4I1hZAF2A5mkSEdiNPotgSK26Mf6?=
 =?us-ascii?Q?O0fAjkt3TtUi5Z1bGyOGzK8oRxPS+oCAw80PG2Kcc6376MJRXYYG7NcpYZaR?=
 =?us-ascii?Q?G3/SGT5SiLEWGzkHu7c3jiX7obyKP7xNwLlHX2q5N5WGmT+wGTNNKmsu1XVC?=
 =?us-ascii?Q?p9SeN8f1T7YNXxNc714rSffbRk2/bnJOoxNBb8lUV4t3K+vS6R26+CarJ1TM?=
 =?us-ascii?Q?K7p2IHHI2W76i7JXyqsl0x/320wgXJwqPsxRDcHSliOvWNWt0wb0KUshJLpm?=
 =?us-ascii?Q?rSwfSxeyRUIh2X4181rnQz2TJSrjtwlE+C52Lorp3jl3cYrivCeZ3uAMUgdq?=
 =?us-ascii?Q?TDISh13uMzjv5ura0mz3jjnNwQ5yIlfr1TUCEXft+j9KSiUwWKzYj8i17u0Y?=
 =?us-ascii?Q?5MN1FRLD/R3dhhxh5fwQa5RUCcEvgYEhNdPqFWLQmf/uqCbBG+p4cfQ92RWM?=
 =?us-ascii?Q?f5qDEpVbsbBI+0Rp3/wF849YlvEfAtht4ona0Ibnp6FNPkkIAM10Y513yf4h?=
 =?us-ascii?Q?Ere9Mv3BjUe85B+3fcaH7PwPbc74Aq44tvo77lmNCdvXUwlY7kIHiYRCijMX?=
 =?us-ascii?Q?A7qN+OSSH6cOHz0k3+SVLCqEA7mEHnjYkMeOOLXtuFqcfbOTF+m4XEuCG5+O?=
 =?us-ascii?Q?WAGZUaiF2t7lPhXxTqvUm0Oh8zdP2Ax+SNISfB6BmdKL8k+OyjIzLEOkiyf/?=
 =?us-ascii?Q?KQrfKhz8KCrnpOEBaT/xaFy3dCpBjmoUsLbxPwgCKeb3RrKT6ytaYtteYJ1u?=
 =?us-ascii?Q?Do64EuRTcYtmYmq2zLm/jO5Vz/e2n1ljBCnO2t5oFODTRZ27f6HcJY3cSxE4?=
 =?us-ascii?Q?q8f+c3Iuqz+gcu59O1LW5fxCqhNjFTB2RqTwYdJ+x8eGJMY7OJVr15IEkbeb?=
 =?us-ascii?Q?1lmcPqz4BMUpN+X2uirwc+D5OlfIRN1bSXoeNm4EMN68zLh5s1mELhS31Eu2?=
 =?us-ascii?Q?p/PxSqSTvhWEuNNUhmc47fYJUK/pIxV7QC8fvIY1Xz5W+XM0odIB5opYc8RN?=
 =?us-ascii?Q?vWX17ubKyiNkqs+kVklCi4dflRUEM49qOs50wan9Weshl5cKldxFobKPD3n1?=
 =?us-ascii?Q?2zD501Oa0Xg24jKH2/c3Q24KHh1LrSXV9CTcdKzyjFcHKTjci9+dScGC7+7L?=
 =?us-ascii?Q?JsErdEjx+XXYo/25pApQjQIVjF9897uxLN9Wd2L2pTELZzo1xO4Ktt23B9bs?=
 =?us-ascii?Q?6kM1tZZEqn4U4evBliem0pFt7cnTXFMJ3nq39/6m7G03d7iD96eq+G8PchnE?=
 =?us-ascii?Q?6NvIUtdcuT/ya4N+/VB4PfcSi+nmWoWkMO2YJoKCZ8FeK52KqWrkhVI93o0X?=
 =?us-ascii?Q?k5uSWu8kjrBZXjs/sm5ONYENAE7tvBVSSRJd9mI4xdx6IMRTEBmSViPKd/+U?=
 =?us-ascii?Q?idPzZya9ypwresjdBAicKOdgbqH8D4mtSrlfFqvmYQYGNcePFVtSyXejW8Y1?=
 =?us-ascii?Q?lFXbNSC4OHN6T1jHaHHMFyU1WVlxVhMzNDR2WYWcJaLTZq0AEgkjSQWlnDwr?=
 =?us-ascii?Q?oAh5lb0Ngg3JBomAQLLAf5M=3D?=
X-OriginatorOrg: amd.com
X-MS-Exchange-CrossTenant-Network-Message-Id: efcc7f32-aefe-43af-06ac-08d9e82cacd7
X-MS-Exchange-CrossTenant-AuthSource: MWHPR12MB1471.namprd12.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Feb 2022 22:21:22.8738
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: FefgeVvj9iUIp+spUVYPGzD5ROXKR/P8fPqndBuGRF8O97SS/2EECoZTnLqmft4W+rd0BGagHv7TiBx0YgJfPw==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB5481
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

On Thu, Feb 03, 2022 at 02:23:43PM -0800, H.J. Lu wrote:
> On Thu, Feb 3, 2022 at 1:58 PM John Allen <john.allen@amd.com> wrote:
> >
> > On Sun, Jan 30, 2022 at 01:18:38PM -0800, Rick Edgecombe wrote:
> > > Shadow stack is supported on newer AMD processors, but the kernel
> > > implementation has not been tested on them. Prevent basic issues from
> > > showing up for normal users by disabling shadow stack on all CPUs except
> > > Intel until it has been tested. At which point the limitation should be
> > > removed.
> >
> > Hi Rick,
> >
> > I have been testing Yu-Cheng's patchsets on AMD hardware and I am
> > working on testing this version now. How are you testing this new
> > series? I can partially test by calling the prctl enable for shadow
> > stack directly from a program, but I'm not sure how useful that's going
> > to be without the glibc support. Do you have a public repo with the
> > necessary glibc changes to enable shadow stack early?
> >
> 
> The glibc CET branch is at
> 
> https://gitlab.com/x86-glibc/glibc/-/commits/users/hjl/cet/master

Thanks, I ran some smoke tests with the updated glibc and it's looking
good so far. Additionally, I ran the new kselftest and it passed.

Thanks,
John

> 
> -- 
> H.J.