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Date:   Fri, 4 Feb 2022 17:02:34 -0600
From:   Bjorn Helgaas <helgaas@kernel.org>
To:     Vidya Sagar <vidyas@nvidia.com>
Cc:     "Kenneth R. Crudup" <kenny@panix.com>, bhelgaas@google.com,
        lorenzo.pieralisi@arm.com, hkallweit1@gmail.com,
        wangxiongfeng2@huawei.com, mika.westerberg@linux.intel.com,
        kai.heng.feng@canonical.com, chris.packham@alliedtelesis.co.nz,
        yangyicong@hisilicon.com, treding@nvidia.com, jonathanh@nvidia.com,
        abhsahu@nvidia.com, sagupta@nvidia.com, linux-pci@vger.kernel.org,
        linux-kernel@vger.kernel.org, kthota@nvidia.com,
        mmaddireddy@nvidia.com, sagar.tv@gmail.com
Subject: Re: [PATCH V1] PCI/ASPM: Save/restore L1SS Capability for
 suspend/resume
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On Wed, Feb 02, 2022 at 09:47:06AM +0530, Vidya Sagar wrote:
> On 2/2/2022 3:55 AM, Kenneth R. Crudup wrote:
> > On Wed, 2 Feb 2022, Vidya Sagar wrote:
> > > BTW, I see that the ASPM L1SS capability is supported by only
> > > two endpoints viz. KIOXIA's NVMe drive and Realtek's Card
> > > reader. None of the root ports seem to have the support. So, I'm
> > > wondering how was it even getting enabled in the first place
> > > earlier?
> > 
> > > (OR)
> > 
> > > was it the case that L1SS sub-states were never enabled earlier
> > > also and the issue was occurring without having ASPM L1SS
> > > enabled? (but with only L0s and L1 enabled??)
> > 
> > I'm not proficient enough in PCIe to be able to be sure of the
> > answers to those- what can/could I do to determine this?
>
> Nothing at this point, but could you please confirm that you are
> using the same system as before? if that is the case, then, I'm not
> sure how is it possible that the earlier patch which is also for
> saving/restoring L1SS registers could affect a system that doesn't
> even support L1SS.
> 
> Bjorn, any thoughts on this?

Do we have a theory on what might have caused the regression before?
Or at least something that is different this time around?

There's been a lot of discussion on this thread, so I'm going to
ignore this patch for now.  If you think it's good to go, please post
it again with the relevant Tested-bys and a note about why we think it
should work this time when it didn't last time.

Bjorn

> > > Also, I see that from 'before' and 'after' logs that for both
> > > NVMe and Card reader and their corresponding root ports, none of
> > > the ASPM states are enabled (not even L0s or L1).
> > > Did you set the policy to 'powersupersave' before hibernating
> > > the system?
> > 
> > Yeah:
> > 
> > CONFIG_PCIEASPM_POWER_SUPERSAVE=y
> > 
> > My laptop loses ~1.5%/hr in S3; I was trying anything I could to reduce that,
> > if possible.
> > 
> >          -Kenny
> > 
> > --
> > Kenneth R. Crudup / Sr. SW Engineer, Scott County Consulting, Orange County CA
> >