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[2620:137:e000::1:20]) by mx.google.com with ESMTP id pi15si2375090pjb.156.2022.02.08.03.51.08; Tue, 08 Feb 2022 03:51:21 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20210112 header.b=QLnMWcre; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233647AbiBGVjT (ORCPT + 99 others); Mon, 7 Feb 2022 16:39:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55838 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231607AbiBGVjR (ORCPT ); Mon, 7 Feb 2022 16:39:17 -0500 Received: from mail-lj1-x22c.google.com (mail-lj1-x22c.google.com [IPv6:2a00:1450:4864:20::22c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB43DC061A73 for ; Mon, 7 Feb 2022 13:39:16 -0800 (PST) Received: by mail-lj1-x22c.google.com with SMTP id a25so21621951lji.9 for ; Mon, 07 Feb 2022 13:39:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=vj6d/kwNaVMSCvSwpd8SPBJUndIKEEtw3knv973Syso=; b=QLnMWcre93OaJiLYldJtRWqs2HqybqunwmgEVs9I1LEXcGSlxFfOOYSD8R+pgn8LzV V0gKqY0KcpXwQtfSgixPE9BEMFzu5WvYt0mYyrHYovLoKR5602RjdEDihU19rhcyd7C3 AcdnkuZanaPMEKCB3W+uoqUiZGd6cky9h2g7u3eFAAPLXDsUPrBd83uAgO/hiQsTMEzp DhIqYvPNyAVtE+uAlCeqrA0CQO2vBKEhYX8lm9tfVQ82Gn2cqT+L7TRIsTMxLZw8iKcy lJ2uFxMn2WKp2IP26br3cl4XwvsUkltNyCI63Xw1ONA10o9bljxMTrIFehgf6XpxExd1 KvKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=vj6d/kwNaVMSCvSwpd8SPBJUndIKEEtw3knv973Syso=; b=DYIWsqX0F/6vVBzmBifKQBp/5PeKEvmTHNTa+E1aZPzn4TChVimY+RWXppWrQTzvoH 6GMrsVXiJPBEaUVFLaVgxL1pRDDjDVZi1IV3WlA7zmJZBGYoNY4slSeoOjG5okchHLmn MVE1SMgieCBq1tydeE6K/0VWb2WlKnLn+KdVGjvJpofChUViPSD/EI15p9UkqxXLNJ2N zMZVSxUGp8dEb4jOAzCwqAwo7pjQulRBvq5OidFa3iFVSmBpAFgF1i1CoYMfzqSSRMf1 T1spkuV9WkJwuBZUwN9X/U4nXf6k6RKpRAR085xn01sofsCR8Cxl76eQncm+Plpj/PpH sJhQ== X-Gm-Message-State: AOAM533nbJ7SW1tMhOyaYN1w3tjfykSAYr3qWOuOgbpv6b9kfnknUrBq bJkWK8GF51hfYXcZyke/AsRIJohLgXnChCW5u3qSCw== X-Received: by 2002:a2e:a5cb:: with SMTP id n11mr845559ljp.361.1644269954862; Mon, 07 Feb 2022 13:39:14 -0800 (PST) MIME-Version: 1.0 References: <20220204115718.14934-1-pbonzini@redhat.com> <20220204115718.14934-11-pbonzini@redhat.com> <04e568ee-8e44-dabe-2cc3-94b9c95287e1@redhat.com> In-Reply-To: <04e568ee-8e44-dabe-2cc3-94b9c95287e1@redhat.com> From: David Matlack Date: Mon, 7 Feb 2022 13:38:48 -0800 Message-ID: Subject: Re: [PATCH 10/23] KVM: MMU: split cpu_role from mmu_role To: Paolo Bonzini Cc: LKML , kvm list , Sean Christopherson , Vitaly Kuznetsov Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-17.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, ENV_AND_HDR_SPF_MATCH,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,USER_IN_DEF_DKIM_WL,USER_IN_DEF_SPF_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Feb 5, 2022 at 6:49 AM Paolo Bonzini wrote: > > On 2/4/22 22:57, David Matlack wrote: > >> + vcpu->arch.root_mmu.cpu_role.base.level = 0; > >> + vcpu->arch.guest_mmu.cpu_role.base.level = 0; > >> + vcpu->arch.nested_mmu.cpu_role.base.level = 0; > > Will cpu_role.base.level already be 0 if CR0.PG=0 && !tdp_enabled? i.e. > > setting cpu_role.base.level to 0 might not have the desired effect. > > > > It might not matter in practice since the shadow_mmu_init_context() and > > kvm_calc_mmu_role_common() check both the mmu_role and cpu_role, but does > > make this reset code confusing. > > > > Good point. The (still unrealized) purpose of this series is to be able > to check mmu_role only, so for now I'll just keep the valid bit in the > ext part of the cpu_role. The mmu_role's level however is never zero, > so I can already use the level when I remove the ext part from the mmu_role. Agreed. > > I'll remove the valid bit of the ext part only after the cpu_role check > is removed, because then it can trivially go. Ok sounds good. > > Paolo >