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[2620:137:e000::1:20]) by mx.google.com with ESMTP id c18si15005833plg.131.2022.02.08.05.15.59; Tue, 08 Feb 2022 05:16:14 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243887AbiBGJtM (ORCPT + 99 others); Mon, 7 Feb 2022 04:49:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35508 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245295AbiBGJkJ (ORCPT ); Mon, 7 Feb 2022 04:40:09 -0500 Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7DF46C0401C0 for ; Mon, 7 Feb 2022 01:40:06 -0800 (PST) Received: from canpemm500009.china.huawei.com (unknown [172.30.72.56]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4Jsh0V0MX8z9sL0; Mon, 7 Feb 2022 17:38:34 +0800 (CST) Received: from [10.67.102.169] (10.67.102.169) by canpemm500009.china.huawei.com (7.192.105.203) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.21; Mon, 7 Feb 2022 17:40:03 +0800 CC: , , , , Subject: Re: [PATCH v3 0/8] Add support for HiSilicon PCIe Tune and Trace device To: Yicong Yang , , , , , , , , , , , , , , , , , , , , , , , , , References: <20220124131118.17887-1-yangyicong@hisilicon.com> From: Yicong Yang Message-ID: <5c1099b2-232f-2dc5-7c31-18fe3343955e@huawei.com> Date: Mon, 7 Feb 2022 17:40:03 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.5.1 MIME-Version: 1.0 In-Reply-To: <20220124131118.17887-1-yangyicong@hisilicon.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.67.102.169] X-ClientProxiedBy: dggems705-chm.china.huawei.com (10.3.19.182) To canpemm500009.china.huawei.com (7.192.105.203) X-CFilter-Loop: Reflected X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,NICE_REPLY_A, RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi perf, ETM and PCI related experts, a gentle ping ... appreciate for the comments. thanks. On 2022/1/24 21:11, Yicong Yang wrote: > HiSilicon PCIe tune and trace device (PTT) is a PCIe Root Complex > integrated Endpoint (RCiEP) device, providing the capability > to dynamically monitor and tune the PCIe traffic (tune), > and trace the TLP headers (trace). > > PTT tune is designed for monitoring and adjusting PCIe link parameters. > We provide several parameters of the PCIe link. Through the driver, > user can adjust the value of certain parameter to affect the PCIe link > for the purpose of enhancing the performance in certian situation. > > PTT trace is designed for dumping the TLP headers to the memory, which > can be used to analyze the transactions and usage condition of the PCIe > Link. Users can choose filters to trace headers, by either requester > ID, or those downstream of a set of Root Ports on the same core of the > PTT device. It's also supported to trace the headers of certain type and > of certain direction. > > The driver registers a PMU device for each PTT device. The trace can > be used through `perf record` and the traced headers can be decoded > by `perf report`. The perf command support for the device is also > added in this patchset. The tune can be used through the sysfs > attributes of related PMU device. See the documentation for the > detailed usage. > > Change since v2: > - address the comments from Mathieu > - rename the directory to ptt to match the function of the device > - spinoff the declarations to a separate header > - split the trace function to several patches > - some other comments. > - make default smmu domain type of PTT device to identity > Drop the RMR as it's not recommended and use an iommu_def_domain_type > quirk to passthrough the device DMA as suggested by Robin. > Link: https://lore.kernel.org/linux-pci/20211116090625.53702-1-yangyicong@hisilicon.com/ > > Change since v1: > - switch the user interface of trace to perf from debugfs > - switch the user interface of tune to sysfs from debugfs > - add perf tool support to start trace and decode the trace data > - address the comments of documentation from Bjorn > - add RMR[1] support of the device as trace works in RMR mode or > direct DMA mode. RMR support is achieved by common APIs rather > than the APIs implemented in [1]. > Link: https://lore.kernel.org/lkml/1618654631-42454-1-git-send-email-yangyicong@hisilicon.com/ > > [1] https://lore.kernel.org/linux-acpi/20210805080724.480-1-shameerali.kolothum.thodi@huawei.com/ > > Qi Liu (1): > perf tool: Add support for HiSilicon PCIe Tune and Trace device driver > > Yicong Yang (7): > hwtracing: Add trace function support for HiSilicon PCIe Tune and > Trace device > hisi_ptt: Register PMU device for PTT trace > hisi_ptt: Add support for dynamically updating the filter list > hisi_ptt: Add tune function support for HiSilicon PCIe Tune and Trace > device > docs: Add HiSilicon PTT device driver documentation > MAINTAINERS: Add maintainer for HiSilicon PTT driver > iommu/arm-smmu-v3: Make default domain type of HiSilicon PTT device to > identity > > Documentation/trace/hisi-ptt.rst | 304 +++++ > MAINTAINERS | 7 + > drivers/Makefile | 1 + > drivers/hwtracing/Kconfig | 2 + > drivers/hwtracing/ptt/Kconfig | 11 + > drivers/hwtracing/ptt/Makefile | 2 + > drivers/hwtracing/ptt/hisi_ptt.c | 1124 +++++++++++++++++ > drivers/hwtracing/ptt/hisi_ptt.h | 239 ++++ > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 16 + > tools/perf/arch/arm/util/auxtrace.c | 56 +- > tools/perf/arch/arm/util/pmu.c | 3 + > tools/perf/arch/arm64/util/Build | 2 +- > tools/perf/arch/arm64/util/hisi_ptt.c | 195 +++ > tools/perf/util/Build | 2 + > tools/perf/util/auxtrace.c | 4 + > tools/perf/util/auxtrace.h | 1 + > tools/perf/util/hisi-ptt-decoder/Build | 1 + > .../hisi-ptt-decoder/hisi-ptt-pkt-decoder.c | 170 +++ > .../hisi-ptt-decoder/hisi-ptt-pkt-decoder.h | 28 + > tools/perf/util/hisi_ptt.c | 228 ++++ > tools/perf/util/hisi_ptt.h | 28 + > 21 files changed, 2420 insertions(+), 4 deletions(-) > create mode 100644 Documentation/trace/hisi-ptt.rst > create mode 100644 drivers/hwtracing/ptt/Kconfig > create mode 100644 drivers/hwtracing/ptt/Makefile > create mode 100644 drivers/hwtracing/ptt/hisi_ptt.c > create mode 100644 drivers/hwtracing/ptt/hisi_ptt.h > create mode 100644 tools/perf/arch/arm64/util/hisi_ptt.c > create mode 100644 tools/perf/util/hisi-ptt-decoder/Build > create mode 100644 tools/perf/util/hisi-ptt-decoder/hisi-ptt-pkt-decoder.c > create mode 100644 tools/perf/util/hisi-ptt-decoder/hisi-ptt-pkt-decoder.h > create mode 100644 tools/perf/util/hisi_ptt.c > create mode 100644 tools/perf/util/hisi_ptt.h >