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[34.82.80.254]) by smtp.gmail.com with ESMTPSA id p21sm207825pfo.97.2022.02.07.14.10.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Feb 2022 14:10:42 -0800 (PST) Date: Mon, 7 Feb 2022 22:10:39 +0000 From: David Matlack To: Paolo Bonzini Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, seanjc@google.com, vkuznets@redhat.com Subject: Re: [PATCH 11/23] KVM: MMU: do not recompute root level from kvm_mmu_role_regs Message-ID: References: <20220204115718.14934-1-pbonzini@redhat.com> <20220204115718.14934-12-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220204115718.14934-12-pbonzini@redhat.com> X-Spam-Status: No, score=-15.3 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Feb 04, 2022 at 06:57:06AM -0500, Paolo Bonzini wrote: > The root_level can be found in the cpu_role (in fact the field > is superfluous and could be removed, but one thing at a time). > Since there is only one usage left of role_regs_to_root_level, > inline it into kvm_calc_cpu_role. > > Signed-off-by: Paolo Bonzini > --- > arch/x86/kvm/mmu/mmu.c | 23 ++++++++--------------- > 1 file changed, 8 insertions(+), 15 deletions(-) > > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c > index f98444e1d834..74789295f922 100644 > --- a/arch/x86/kvm/mmu/mmu.c > +++ b/arch/x86/kvm/mmu/mmu.c > @@ -253,19 +253,6 @@ static struct kvm_mmu_role_regs vcpu_to_role_regs(struct kvm_vcpu *vcpu) > return regs; > } > > -static int role_regs_to_root_level(const struct kvm_mmu_role_regs *regs) > -{ > - if (!____is_cr0_pg(regs)) > - return 0; > - else if (____is_efer_lma(regs)) > - return ____is_cr4_la57(regs) ? PT64_ROOT_5LEVEL : > - PT64_ROOT_4LEVEL; > - else if (____is_cr4_pae(regs)) > - return PT32E_ROOT_LEVEL; > - else > - return PT32_ROOT_LEVEL; > -} > - > static inline bool kvm_available_flush_tlb_with_range(void) > { > return kvm_x86_ops.tlb_remote_flush_with_range; > @@ -4673,7 +4660,13 @@ kvm_calc_cpu_role(struct kvm_vcpu *vcpu, const struct kvm_mmu_role_regs *regs) > role.base.smep_andnot_wp = ____is_cr4_smep(regs) && !____is_cr0_wp(regs); > role.base.smap_andnot_wp = ____is_cr4_smap(regs) && !____is_cr0_wp(regs); > role.base.has_4_byte_gpte = !____is_cr4_pae(regs); > - role.base.level = role_regs_to_root_level(regs); > + > + if (____is_efer_lma(regs)) > + role.base.level = ____is_cr4_la57(regs) ? PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL; > + else if (____is_cr4_pae(regs)) > + role.base.level = PT32E_ROOT_LEVEL; > + else > + role.base.level = PT32_ROOT_LEVEL; Did you mean to drop the !CR0.PG case? > > role.ext.cr0_pg = 1; > role.ext.cr4_pae = ____is_cr4_pae(regs); > @@ -4766,7 +4759,7 @@ static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu, > context->get_guest_pgd = get_cr3; > context->get_pdptr = kvm_pdptr_read; > context->inject_page_fault = kvm_inject_page_fault; > - context->root_level = role_regs_to_root_level(regs); > + context->root_level = cpu_role.base.level; > > if (!is_cr0_pg(context)) > context->gva_to_gpa = nonpaging_gva_to_gpa; > -- > 2.31.1 > >