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Wed, 9 Feb 2022 03:54:46 +0000 From: Akhil R To: Rob Herring CC: "thierry.reding@gmail.com" , Jonathan Hunter , Mikko Perttunen , Laxman Dewangan , "digetx@gmail.com" , "linux-i2c@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-tegra@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: RE: [PATCH 2/6] dt-bindings: i2c: tegra: Add Tegra234 details Thread-Topic: [PATCH 2/6] dt-bindings: i2c: tegra: Add Tegra234 details Thread-Index: AQHYCIHaCU7SytsfD0uZtfa+2khitKyKpXcAgAAZTyA= Date: Wed, 9 Feb 2022 03:54:45 +0000 Message-ID: References: <1642080623-15980-1-git-send-email-akhilrajeev@nvidia.com> <1642080623-15980-3-git-send-email-akhilrajeev@nvidia.com> In-Reply-To: Accept-Language: en-IN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nvidia.com; x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 18a83f6f-d82c-4faf-98d0-08d9eb7fe983 x-ms-traffictypediagnostic: BL0PR12MB5689:EE_ x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:9508; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM5PR12MB1850.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 18a83f6f-d82c-4faf-98d0-08d9eb7fe983 X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Feb 2022 03:54:45.9944 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: I2k/i7issDA+LJXxxC2xXV1Cfcdk4QKQ53iQDX6o0soYJDoCTvNWV9tRchAeh3vdOIzh9glXQCOg6UIqqEyVmw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR12MB5689 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On Thu, Jan 13, 2022 at 07:00:19PM +0530, Akhil R wrote: > > Add documentation for Tegra234 I2C compatible. > > > > Signed-off-by: Akhil R > > --- > > Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml | 5 > > +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git > > a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml > > b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml > > index 424a4fc..c58e256 100644 > > --- a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml > > +++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml > > @@ -80,6 +80,11 @@ properties: > > support for 64 KiB transactions whereas earlier chips suppor= ted no > > more than 4 KiB per transactions. > > const: nvidia,tegra194-i2c > > + - description: | > > + Tegra234 has 8 generic I2C controllers, two of which are in = the AON > > + (always-on) partition of the SoC. All of these controllers a= re > > + similar to those found on Tegra194. > > + const: nvidia,tegra234-i2c >=20 > Sounds like this needs a fallback to nvidia,tegra194-i2c if it works, but= without > optimal timing. Yes. The timing for tegra194 works for tegra234 as well. So, this change is= reverted. I had sent the patch updated. Latest is here - https://lkml.org/lkml/2022/1= /24/335 Only the device tree nodes are required to be added now. Thanks, Akhil