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[23.128.96.18]) by mx.google.com with ESMTP id b20si4597962pjp.15.2022.02.08.23.49.59; Tue, 08 Feb 2022 23:50:12 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=Rri3qUQR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1387417AbiBHWXz (ORCPT + 99 others); Tue, 8 Feb 2022 17:23:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46888 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1386284AbiBHT7O (ORCPT ); Tue, 8 Feb 2022 14:59:14 -0500 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9AE8FC0613CB for ; Tue, 8 Feb 2022 11:59:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1644350354; x=1675886354; h=from:to:cc:subject:date:message-id; bh=kK9GFhaLkKmCzRm4YHc+FKL5dh0/iSAsETrpcjUA5sU=; b=Rri3qUQR1idHRmA1HWajyag0gcNJcpboCoS70X4UtlblKlV2Zsdq9RXm aO/c/Nw3AUhfBmTWTd7MnTBAv70CF2LDUT3b9qJFUAXqi0SiuKbvqbbel jc/JB6RnlQjZLA5CveJPLhp4MTTdZNuuoJM4CTosEjN3XIjaP5t9p78Oc 0=; Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 08 Feb 2022 11:59:13 -0800 X-QCInternal: smtphost Received: from ironmsg01-blr.qualcomm.com ([10.86.208.130]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 08 Feb 2022 11:59:12 -0800 X-QCInternal: smtphost Received: from c-sbhanu-linux.qualcomm.com ([10.242.50.201]) by ironmsg01-blr.qualcomm.com with ESMTP; 09 Feb 2022 01:28:53 +0530 Received: by c-sbhanu-linux.qualcomm.com (Postfix, from userid 2344807) id AF6325758; Wed, 9 Feb 2022 01:28:51 +0530 (IST) From: Shaik Sajida Bhanu To: dianders@chromium.org, tudor.ambarus@microchip.com, michael@walle.cc, p.yadav@ti.com, miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: quic_stummala@quicinc.com, quic_vbadigan@quicinc.com, quic_rampraka@quicinc.com, quic_pragalla@quicinc.com, quic_sartgarg@quicinc.com, Shaik Sajida Bhanu Subject: [PATCH V5] mtd: spi-nor: winbond: Add support for winbond chip Date: Wed, 9 Feb 2022 01:28:50 +0530 Message-Id: <1644350330-8809-1-git-send-email-quic_c_sbhanu@quicinc.com> X-Mailer: git-send-email 2.7.4 X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for winbond W25Q512NW-IM chip. Signed-off-by: Shaik Sajida Bhanu Reviewed-by: Doug Anderson --- Changes since V1: - Added space before name of the flash part as suggested by Doug. Changes since V2: - Updated chip name as w25q512nwm as suggested by Doug. Changes since V3: - Updated flash_info flags passing according to below patch. Changes since V4: - Added OTP support for SPI card as suggested by Michael Walle. - Updated SFDP flags passing as suggested by Pratyush Yadav. --- drivers/mtd/spi-nor/winbond.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 675f32c..315b9f6 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -124,6 +124,10 @@ static const struct flash_info winbond_parts[] = { { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) }, + { "w25q512nwm", INFO(0xef8020, 0, 64 * 1024, 1024) + FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) + PARSE_SFDP + OTP_INFO(256, 3, 0x1000, 0x1000) }, { "w25q512jvq", INFO(0xef4020, 0, 64 * 1024, 1024) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation