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Date:   Tue, 8 Feb 2022 21:01:35 -0600
From:   Rob Herring <robh@kernel.org>
To:     Ansuel Smith <ansuelsmth@gmail.com>
Cc:     Andy Gross <agross@kernel.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: soc: qcom: add qcom,tcsr bindings
Message-ID: <YgMuj1yyk6DnNzlw@robh.at.kernel.org>
References: <20220122001609.15904-1-ansuelsmth@gmail.com>
 <20220122001609.15904-2-ansuelsmth@gmail.com>
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On Sat, Jan 22, 2022 at 01:16:08AM +0100, Ansuel Smith wrote:
> Add qcom,tcsr-ipq8064 and qcom,tcsr-ipq4019 Documentation for the
> tcsr present in ipq8064 and ipa4019 required to configure and
> set various peripherals present in the SoC.
> 
> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
> ---
>  .../bindings/soc/qcom/qcom,tcsr-ipq4019.yaml  | 93 +++++++++++++++++++
>  .../bindings/soc/qcom/qcom,tcsr-ipq8064.yaml  | 47 ++++++++++
>  2 files changed, 140 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,tcsr-ipq4019.yaml
>  create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,tcsr-ipq8064.yaml
> 
> diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,tcsr-ipq4019.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,tcsr-ipq4019.yaml
> new file mode 100644
> index 000000000000..3a82ccbb6588
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,tcsr-ipq4019.yaml
> @@ -0,0 +1,93 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/soc/qcom/qcom,tcsr-ipq4019.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Qualcomm Top Control and Status Registers binding for IPQ4019
> +
> +maintainers:
> +  - Ansuel Smith <ansuelsmth@gmail.com>
> +
> +description: |
> +  This binding describes the Qualcomm Top Control and Status Registers, used
> +  for accessing configuration and mux settings for a variety of peripherals
> +  for ipq4019.
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: qcom,tcsr-ipq4019

Normal order is qcom,ipq4019-tcsr

> +      - const: syscon
> +
> +  reg:
> +    maxItems: 1
> +
> +  qcom,usb-hsphy-mode-select:
> +    description: Select usb hsphy mode for ipq4019
> +    enum:
> +      - 'host'
> +      - 'device'

Don't need quotes.

> +
> +  qcom,ess-interface-select:
> +    description: Select ess interface mode for ipq4019
> +    enum:
> +      - 'psgmii'
> +      - 'rgmii5'
> +      - 'rmii0'
> +      - 'rmii1'
> +      - 'rmii0_rmii1'
> +      - 'rgmii4'
> +
> +  qcom,wifi-glb-cfg-enable-axid:
> +    description: Enable AXI master bus Axid translating
> +                  to confirm all txn submitted by order for ipq4019

Wrap at ~80 and indent 2 more spaces (than 'description').

> +    type: boolean
> +
> +  qcom,wifi-glb-cfg-socslv-mode:
> +    description: Select wifi socslv mode for ipq4019
> +                  snoc use SNOC socslv_wxi_bvalid.
> +                  local use locally generate socslv_wxi_bvalid for performance.
> +    enum:
> +      - 'snoc'
> +      - 'local'
> +
> +  qcom,wifi_noc_memtype_m0_m2:

s/_/-/

> +    description: Configure special wifi memory type needed for
> +                  some IPQ40xx devicesfor ipq4019
> +    type: boolean
> +
> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    tcsr@194b000 {
> +      compatible = "qcom,tcsr-ipq4019", "syscon";
> +      reg = <0x194b000 0x100>;
> +      qcom,usb-hsphy-mode-select = "host";
> +    };
> +
> +    tcsr@1949000 {
> +      compatible = "qcom,tcsr-ipq4019", "syscon";
> +      reg = <0x1949000 0x100>;
> +      qcom,wifi-glb-cfg-enable-axid;
> +      qcom,wifi-glb-cfg-socslv-mode = "local";
> +    };
> +
> +    ess_tcsr@1953000 {
> +      compatible = "qcom,tcsr-ipq4019", "syscon";
> +      reg = <0x1953000 0x1000>;
> +      qcom,ess-interface-select = "psgmii";
> +    };
> +
> +    tcsr@1957000 {
> +      compatible = "qcom,tcsr-ipq4019", "syscon";
> +      reg = <0x1957000 0x100>;
> +      qcom,wifi_noc_memtype_m0_m2;
> +    };
> +
> +...
> diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,tcsr-ipq8064.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,tcsr-ipq8064.yaml
> new file mode 100644
> index 000000000000..4ccc0bfccec5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,tcsr-ipq8064.yaml
> @@ -0,0 +1,47 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/soc/qcom/qcom,tcsr-ipq8064.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Qualcomm Top Control and Status Registers binding for IPQ8064
> +
> +maintainers:
> +  - Ansuel Smith <ansuelsmth@gmail.com>
> +
> +description: |
> +  This binding describes the Qualcomm Top Control and Status Registers, used
> +  for accessing configuration and mux settings for a variety of peripherals
> +  for ipq8064.
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: qcom,tcsr-ipq8064

qcom,ipq8064-tcsr

> +      - const: syscon
> +
> +  reg:
> +    maxItems: 1
> +
> +  qcom,usb-ctrl-select:
> +    description: Select usb3 ctrl type for ipq8064
> +    enum:
> +      - 'p0'
> +      - 'p1'
> +      - 'dual'
> +
> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    tcsr: syscon@1a400000 {
> +      compatible = "qcom,tcsr-ipq8064", "syscon";
> +      reg = <0x1a400000 0x100>;
> +      qcom,usb-ctrl-select = "dual";
> +    };
> +
> +...
> -- 
> 2.33.1
> 
>