Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Date:   Tue, 8 Feb 2022 20:49:36 -0600
From:   Rob Herring <robh@kernel.org>
To:     Sander Vanheule <sander@svanheule.net>
Cc:     linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
        Daniel Lezcano <daniel.lezcano@linaro.org>,
        Thomas Gleixner <tglx@linutronix.de>
Subject: Re: [PATCH 1/2] dt-bindings: timer: Add realtek,otto-tc binding
Message-ID: <YgMrwEXraoiJxSXe@robh.at.kernel.org>
References: <cover.1642369117.git.sander@svanheule.net>
 <7c53821386b8f4c1c0ac440f1cd186e09f4a0456.1642369117.git.sander@svanheule.net>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <7c53821386b8f4c1c0ac440f1cd186e09f4a0456.1642369117.git.sander@svanheule.net>
Precedence: bulk

On Sun, Jan 16, 2022 at 10:39:24PM +0100, Sander Vanheule wrote:
> New binding for the timer/counter blocks found on the Realtek Otto MIPS
> platform.
> 
> Signed-off-by: Sander Vanheule <sander@svanheule.net>
> ---
>  .../bindings/timer/realtek,otto-tc.yaml       | 64 +++++++++++++++++++
>  1 file changed, 64 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/realtek,otto-tc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/timer/realtek,otto-tc.yaml b/Documentation/devicetree/bindings/timer/realtek,otto-tc.yaml
> new file mode 100644
> index 000000000000..12971b9ecdf5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/realtek,otto-tc.yaml
> @@ -0,0 +1,64 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/timer/realtek,otto-tc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Realtek Otto platform timer/counter bindings
> +
> +description:

'|' at the end if you want to keep formatting.

> +  "Up-counting 28-bit timer that can operate in oneshot or repeating mode,

And drop the quotes.

> +  providing an interrupt at roll-over.
> +
> +  The timer is driven by a divided clock, derived from the bus clock. The clock
> +  divisor is configurable from 2 to 65535. Divisor values of 0 and 1 disable
> +  the timer clock. The timer can also be enabled or disabled independently from
> +  the clock (divisor) selection.
> +
> +  The number of timers supported by the different SoC families is:
> +  - RTL8380: 5 timers
> +  - RTL8390: 5 timers
> +  - RTL9300: 6 timers
> +  - RTL9310: 7 timers"
> +
> +maintainers:
> +  - Sander Vanheule <sander@svanheule.net>
> +
> +properties:
> +  compatible:
> +    const: realtek,otto-tc

4 SoCs with differences in the block, you need 4 SoC specific 
compatibles. With a fallback if appropriate.

> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  clocks:
> +    items:
> +      - description: Parent clock from peripheral bus
> +
> +  clock-names:
> +    items:
> +      - const: bus
> +
> +additionalProperties: false
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +  - clock-names
> +
> +examples:
> +  - |
> +    timer0: timer@3100 {

Drop unused labels.

> +      compatible = "realtek,otto-tc";
> +      reg = <0x3100 0x10>;
> +
> +      interrupts = <29 4>;
> +
> +      clocks = <&lx_clk>;
> +      clock-names = "bus";
> +    };
> -- 
> 2.34.1
> 
>