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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id f65si14891865pgc.524.2022.02.09.01.06.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Feb 2022 01:06:14 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=JhnsImJh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 90EBCE019770; Wed, 9 Feb 2022 00:50:53 -0800 (PST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347128AbiBHGUK (ORCPT + 99 others); Tue, 8 Feb 2022 01:20:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59956 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238162AbiBHGUH (ORCPT ); Tue, 8 Feb 2022 01:20:07 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EB56AC0401DC; Mon, 7 Feb 2022 22:20:06 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 82393615D9; Tue, 8 Feb 2022 06:20:06 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EB130C340F7; Tue, 8 Feb 2022 06:20:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1644301206; bh=8mbg9gAB8iQcvuTtfOdsQcKZM18jH6RK7bBh/Mp6NcA=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=JhnsImJhIzZHu6sJMGL/RmRHVlmhwDqcx8C74nrK8Fu120kxQSmvk1/Inc+rc3d5o C+zKrlIZGSZs22JZgfN0UP8Gh7K65HxCZjOWYp6cvbqqHDl/z3bJh2S+uvukp5VA1Y YArqi8WxcuZr/+tj88acbN9EDnSwPcSMW+4K0hR1Yb2Mj3AeoNnKUHm6Dk15Gext/6 SQtKjP1+I66GV8cWhtkQ5fqZpNEpNYqD9MdQcM6nKF8vxbBvyvNc9iojRGojvpzhKl cvLz0whFJp+Ymowo4vEMKqEp/0yqvPSTmzDyEmctIqbxTX6FGjrM+YxUizcWANYnc9 xrPE/XmU9BpZA== Received: by mail-vs1-f52.google.com with SMTP id r20so2271375vsn.0; Mon, 07 Feb 2022 22:20:05 -0800 (PST) X-Gm-Message-State: AOAM533mA+3b7Gsp4FQ1bgwDVd3euVAwjNKIwhS37D3oxGiVhkgG3zQ0 DdvHVrLRjSzqTZwbOmcaNj3424OHNYxksSjzN6Q= X-Received: by 2002:a67:ea4e:: with SMTP id r14mr638112vso.51.1644301204827; Mon, 07 Feb 2022 22:20:04 -0800 (PST) MIME-Version: 1.0 References: <20220126114452.692512-1-apatel@ventanamicro.com> <20220126114452.692512-5-apatel@ventanamicro.com> In-Reply-To: <20220126114452.692512-5-apatel@ventanamicro.com> From: Guo Ren Date: Tue, 8 Feb 2022 14:19:53 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v10 4/8] RISC-V: Add SBI HSM suspend related defines To: Anup Patel Cc: Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Ulf Hansson , "Rafael J . Wysocki" , Pavel Machek , Rob Herring , Sandeep Tripathy , Atish Patra , Alistair Francis , Liush , Anup Patel , devicetree , linux-riscv , Linux Kernel Mailing List , linux-pm@vger.kernel.org, Linux ARM , kvm-riscv@lists.infradead.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,MAILING_LIST_MULTI, RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Reviewed-by: Guo Ren On Wed, Jan 26, 2022 at 7:48 PM Anup Patel wrote: > > From: Anup Patel > > We add defines related to SBI HSM suspend call and also > update HSM states naming as-per latest SBI specification. > > Signed-off-by: Anup Patel > Signed-off-by: Anup Patel > --- > arch/riscv/include/asm/sbi.h | 27 ++++++++++++++++++++++----- > arch/riscv/kernel/cpu_ops_sbi.c | 2 +- > arch/riscv/kvm/vcpu_sbi_hsm.c | 4 ++-- > 3 files changed, 25 insertions(+), 8 deletions(-) > > diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h > index d1c37479d828..06133b4f8e20 100644 > --- a/arch/riscv/include/asm/sbi.h > +++ b/arch/riscv/include/asm/sbi.h > @@ -71,15 +71,32 @@ enum sbi_ext_hsm_fid { > SBI_EXT_HSM_HART_START = 0, > SBI_EXT_HSM_HART_STOP, > SBI_EXT_HSM_HART_STATUS, > + SBI_EXT_HSM_HART_SUSPEND, > }; > > -enum sbi_hsm_hart_status { > - SBI_HSM_HART_STATUS_STARTED = 0, > - SBI_HSM_HART_STATUS_STOPPED, > - SBI_HSM_HART_STATUS_START_PENDING, > - SBI_HSM_HART_STATUS_STOP_PENDING, > +enum sbi_hsm_hart_state { > + SBI_HSM_STATE_STARTED = 0, > + SBI_HSM_STATE_STOPPED, > + SBI_HSM_STATE_START_PENDING, > + SBI_HSM_STATE_STOP_PENDING, > + SBI_HSM_STATE_SUSPENDED, > + SBI_HSM_STATE_SUSPEND_PENDING, > + SBI_HSM_STATE_RESUME_PENDING, > }; > > +#define SBI_HSM_SUSP_BASE_MASK 0x7fffffff > +#define SBI_HSM_SUSP_NON_RET_BIT 0x80000000 > +#define SBI_HSM_SUSP_PLAT_BASE 0x10000000 > + > +#define SBI_HSM_SUSPEND_RET_DEFAULT 0x00000000 > +#define SBI_HSM_SUSPEND_RET_PLATFORM SBI_HSM_SUSP_PLAT_BASE > +#define SBI_HSM_SUSPEND_RET_LAST SBI_HSM_SUSP_BASE_MASK > +#define SBI_HSM_SUSPEND_NON_RET_DEFAULT SBI_HSM_SUSP_NON_RET_BIT > +#define SBI_HSM_SUSPEND_NON_RET_PLATFORM (SBI_HSM_SUSP_NON_RET_BIT | \ > + SBI_HSM_SUSP_PLAT_BASE) > +#define SBI_HSM_SUSPEND_NON_RET_LAST (SBI_HSM_SUSP_NON_RET_BIT | \ > + SBI_HSM_SUSP_BASE_MASK) > + > enum sbi_ext_srst_fid { > SBI_EXT_SRST_RESET = 0, > }; > diff --git a/arch/riscv/kernel/cpu_ops_sbi.c b/arch/riscv/kernel/cpu_ops_sbi.c > index dae29cbfe550..2e16f6732cdf 100644 > --- a/arch/riscv/kernel/cpu_ops_sbi.c > +++ b/arch/riscv/kernel/cpu_ops_sbi.c > @@ -111,7 +111,7 @@ static int sbi_cpu_is_stopped(unsigned int cpuid) > > rc = sbi_hsm_hart_get_status(hartid); > > - if (rc == SBI_HSM_HART_STATUS_STOPPED) > + if (rc == SBI_HSM_STATE_STOPPED) > return 0; > return rc; > } > diff --git a/arch/riscv/kvm/vcpu_sbi_hsm.c b/arch/riscv/kvm/vcpu_sbi_hsm.c > index 2e383687fa48..1ac4b2e8e4ec 100644 > --- a/arch/riscv/kvm/vcpu_sbi_hsm.c > +++ b/arch/riscv/kvm/vcpu_sbi_hsm.c > @@ -60,9 +60,9 @@ static int kvm_sbi_hsm_vcpu_get_status(struct kvm_vcpu *vcpu) > if (!target_vcpu) > return -EINVAL; > if (!target_vcpu->arch.power_off) > - return SBI_HSM_HART_STATUS_STARTED; > + return SBI_HSM_STATE_STARTED; > else > - return SBI_HSM_HART_STATUS_STOPPED; > + return SBI_HSM_STATE_STOPPED; > } > > static int kvm_sbi_ext_hsm_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, > -- > 2.25.1 > > > -- > kvm-riscv mailing list > kvm-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/kvm-riscv -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/