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[88.153.139.166]) by smtp.gmail.com with ESMTPSA id g9sm3487059ejm.152.2022.02.07.01.29.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Feb 2022 01:29:01 -0800 (PST) From: Patrick Rudolph To: Peter Rosin , Laurent Pinchart Cc: Patrick Rudolph , Rob Herring , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [v4 1/3] dt-bindings: i2c: Add Maxim MAX735x/MAX736x variants Date: Mon, 7 Feb 2022 10:28:24 +0100 Message-Id: <20220207092827.104978-2-patrick.rudolph@9elements.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220207092827.104978-1-patrick.rudolph@9elements.com> References: <20220207092827.104978-1-patrick.rudolph@9elements.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Update the pca954x bindings to add support for the Maxim MAX735x/MAX736x chips. The functionality will be provided by the exisintg pca954x driver. While on it make the interrupts support conditionally as not all of the existing chips have interrupts. For chips that are powered off by default add an optional regulator called vdd-supply. Signed-off-by: Patrick Rudolph --- .../bindings/i2c/i2c-mux-pca954x.yaml | 44 ++++++++++++++----- 1 file changed, 34 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml index 9f1726d0356b..8d90127b06ce 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml @@ -4,21 +4,48 @@ $id: http://devicetree.org/schemas/i2c/i2c-mux-pca954x.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: NXP PCA954x I2C bus switch +title: NXP PCA954x I2C and compatible bus switches maintainers: - Laurent Pinchart description: - The binding supports NXP PCA954x and PCA984x I2C mux/switch devices. + The binding supports NXP PCA954x and PCA984x I2C mux/switch devices, + and the Maxim MAX735x and MAX736x I2C mux/switch devices. allOf: - $ref: /schemas/i2c/i2c-mux.yaml# + - if: + properties: + compatible: + contains: + enum: + - maxim,max7367 + - maxim,max7369 + - nxp,pca9542 + - nxp,pca9543 + - nxp,pca9544 + - nxp,pca9545 + then: + properties: + interrupts: + maxitems: 1 + + "#interrupt-cells": + const: 2 + + interrupt-controller: true properties: compatible: oneOf: - enum: + - maxim,max7356 + - maxim,max7357 + - maxim,max7358 + - maxim,max7367 + - maxim,max7368 + - maxim,max7369 - nxp,pca9540 - nxp,pca9542 - nxp,pca9543 @@ -38,14 +65,6 @@ properties: reg: maxItems: 1 - interrupts: - maxItems: 1 - - "#interrupt-cells": - const: 2 - - interrupt-controller: true - reset-gpios: maxItems: 1 @@ -59,6 +78,9 @@ properties: description: if present, overrides i2c-mux-idle-disconnect $ref: /schemas/mux/mux-controller.yaml#/properties/idle-state + vdd-supply: + description: A voltage regulator supplying power to the chip. + required: - compatible - reg @@ -79,6 +101,8 @@ examples: #size-cells = <0>; reg = <0x74>; + vdd-supply = <&p3v3>; + interrupt-parent = <&ipic>; interrupts = <17 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; -- 2.34.1