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CC:     "Zengtao (B)" <prime.zeng@hisilicon.com>,
        "liuqi (BA)" <liuqi115@huawei.com>,
        Zhangshaokun <zhangshaokun@hisilicon.com>,
        Linuxarm <linuxarm@huawei.com>,
        "Song Bao Hua (Barry Song)" <song.bao.hua@hisilicon.com>
Subject: Re: [PATCH v3 8/8] iommu/arm-smmu-v3: Make default domain type of
 HiSilicon PTT device to identity
To:     John Garry <john.garry@huawei.com>,
        Yicong Yang <yangyicong@hisilicon.com>,
        "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
        "helgaas@kernel.org" <helgaas@kernel.org>,
        "alexander.shishkin@linux.intel.com" 
        <alexander.shishkin@linux.intel.com>,
        "lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
        "will@kernel.org" <will@kernel.org>,
        "mark.rutland@arm.com" <mark.rutland@arm.com>,
        "mathieu.poirier@linaro.org" <mathieu.poirier@linaro.org>,
        "suzuki.poulose@arm.com" <suzuki.poulose@arm.com>,
        "mike.leach@linaro.org" <mike.leach@linaro.org>,
        "leo.yan@linaro.org" <leo.yan@linaro.org>,
        Jonathan Cameron <jonathan.cameron@huawei.com>,
        "daniel.thompson@linaro.org" <daniel.thompson@linaro.org>,
        "joro@8bytes.org" <joro@8bytes.org>,
        Shameerali Kolothum Thodi 
        <shameerali.kolothum.thodi@huawei.com>,
        "robin.murphy@arm.com" <robin.murphy@arm.com>,
        "peterz@infradead.org" <peterz@infradead.org>,
        "mingo@redhat.com" <mingo@redhat.com>,
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        "coresight@lists.linaro.org" <coresight@lists.linaro.org>,
        "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
        "linux-perf-users@vger.kernel.org" <linux-perf-users@vger.kernel.org>,
        "iommu@lists.linux-foundation.org" <iommu@lists.linux-foundation.org>
References: <20220124131118.17887-1-yangyicong@hisilicon.com>
 <20220124131118.17887-9-yangyicong@hisilicon.com>
 <4f6f6e0f-4398-3018-cc35-6aa7ea1305fe@huawei.com>
 <ae45a637-2c67-4126-3007-6829320d5659@huawei.com>
 <144329a3-8125-1975-7f23-a247343a679e@huawei.com>
From:   Yicong Yang <yangyicong@huawei.com>
Message-ID: <d92c9d64-6a89-b7d5-02e3-519ca32f27e9@huawei.com>
Date:   Tue, 8 Feb 2022 20:20:12 +0800
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On 2022/2/8 19:56, John Garry wrote:
> On 08/02/2022 11:21, Yicong Yang wrote:
>>> This patch should be earlier in the series, before the PTT driver, and the comment on hisi_ptt_check_iommu_mapping() should mention what is going on here.
>>>
>> ok I'll reorder the serives and modify the comments of hisi_ptt_check_iommu_mapping() like:
>>
>> /*
>>   * The DMA of PTT trace can only use direct mapping, due to some
>>   * hardware restriction. Check whether there is an iommu or the
>>   * policy of the iommu domain is passthrough, otherwise the trace
>>   * cannot work.
> 
> IOMMU, capitalize acronyms
> 

ok.

>>   *
>>   * The PTT device is supposed to behind the arm smmu v3, which
>>   * should have passthrough the device by a quirk. Otherwise user
>>   * should manually set the iommu domain type to identity through
>>   * sysfs.
> 
> Sorry, but I don't really understand your meaning here.
> 
> I did not think that if we have a default domain then we can change via sysfs to anything else.
> 

ok I think the last sentence maybe misleading and better drop it.

>>   */
>>
>>>> Signed-off-by: Yicong Yang<yangyicong@hisilicon.com>
>>>> ---
>>>>    drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 16 ++++++++++++++++
>>>>    1 file changed, 16 insertions(+)
>>>>
>>>> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>>>> index 6dc6d8b6b368..6f67a2b1dd27 100644
>>>> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>>>> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>>>> @@ -2838,6 +2838,21 @@ static int arm_smmu_dev_disable_feature(struct device *dev,
>>>>        }
>>>>    }
>>>>    +#define IS_HISI_PTT_DEVICE(pdev)    ((pdev)->vendor == PCI_VENDOR_ID_HUAWEI && \
>>>> +                     (pdev)->device == 0xa12e)
>>> I assume that not all revisions will require this check, right?
> 
> So if you are very confident that the next revision will be fixed then I would add a check for this current broken revision.
> 
>>>
>> For current revisions it's necessary.
>>
> 
> .