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Wed, 9 Feb 2022 10:23:46 +0000 From: "Sajida Bhanu (Temp) (QUIC)" To: Michael Walle , "Sajida Bhanu (Temp) (QUIC)" CC: "dianders@chromium.org" , "tudor.ambarus@microchip.com" , "p.yadav@ti.com" , "miquel.raynal@bootlin.com" , "richard@nod.at" , "vigneshr@ti.com" , "linux-mtd@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "Sahitya Tummala (QUIC)" , "Veerabhadrarao Badiganti (QUIC)" , "Ram Prakash Gupta (QUIC)" , "Pradeep Pragallapati (QUIC)" , "Sarthak Garg (QUIC)" Subject: RE: [PATCH V5] mtd: spi-nor: winbond: Add support for winbond chip Thread-Topic: [PATCH V5] mtd: spi-nor: winbond: Add support for winbond chip Thread-Index: AQHYHSZc+MddQRsTVUmI/Muk+X5ezKyK5F4AgAAfjMA= Date: Wed, 9 Feb 2022 10:23:46 +0000 Message-ID: References: <1644350330-8809-1-git-send-email-quic_c_sbhanu@quicinc.com> In-Reply-To: Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=quicinc.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: quicinc.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SJ0PR02MB8449.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0a4858f7-3b54-4d73-3e7e-08d9ebb64165 X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Feb 2022 10:23:46.1959 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 98e9ba89-e1a1-4e38-9007-8bdabc25de1d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: siRGAN1dEgKDFg8X+4NTb3pnBPDPe20DgpnO78vc7mfDtJz/gndHIgWkXDRcndBUXddB8W/Wy2dKo5/ecax5iDTyk2Rs7q+s7IUl3eJ5k0E= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN4PR0201MB3437 X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Thanks for the review. Please find the inline comments. Thanks, Sajida -----Original Message----- From: Michael Walle =20 Sent: Wednesday, February 9, 2022 2:01 PM To: Sajida Bhanu (Temp) (QUIC) Cc: dianders@chromium.org; tudor.ambarus@microchip.com; p.yadav@ti.com; miq= uel.raynal@bootlin.com; richard@nod.at; vigneshr@ti.com; linux-mtd@lists.in= fradead.org; linux-kernel@vger.kernel.org; Sahitya Tummala (QUIC) ; Veerabhadrarao Badiganti (QUIC) ; Ram Prakash Gupta (QUIC) ; Pradeep Pragall= apati (QUIC) ; Sarthak Garg (QUIC) Subject: Re: [PATCH V5] mtd: spi-nor: winbond: Add support for winbond chip Hi, Am 2022-02-08 20:58, schrieb Shaik Sajida Bhanu: > Add support for winbond W25Q512NW-IM chip. Also please include that in the subject. Eg. mtd: spi-nor: winbond: add support for W25Q512NW-IM >=20 > Signed-off-by: Shaik Sajida Bhanu > Reviewed-by: Doug Anderson > --- > Changes since V1: > - Added space before name of the flash part as suggested by Doug. >=20 > Changes since V2: > - Updated chip name as w25q512nwm as suggested by Doug. >=20 > Changes since V3: > - Updated flash_info flags passing according to below patch. >=20 > Changes since V4: > - Added OTP support for SPI card as suggested by Michael Walle. > - Updated SFDP flags passing as suggested by Pratyush Yadav. > --- > drivers/mtd/spi-nor/winbond.c | 4 ++++ > 1 file changed, 4 insertions(+) >=20 > diff --git a/drivers/mtd/spi-nor/winbond.c=20 > b/drivers/mtd/spi-nor/winbond.c index 675f32c..315b9f6 100644 > --- a/drivers/mtd/spi-nor/winbond.c > +++ b/drivers/mtd/spi-nor/winbond.c > @@ -124,6 +124,10 @@ static const struct flash_info winbond_parts[] =3D { > { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024) > NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ | > SPI_NOR_DUAL_READ) }, > + { "w25q512nwm", INFO(0xef8020, 0, 64 * 1024, 1024) > + FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) > + PARSE_SFDP This usually goes first, eg. PARSE_SFDP FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) OTP_INFO(256, 3, 0x1000, 0x1000) >>>> Sure will update. > + OTP_INFO(256, 3, 0x1000, 0x1000) }, > { "w25q512jvq", INFO(0xef4020, 0, 64 * 1024, 1024) > NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | > SPI_NOR_QUAD_READ) }, Otherwise the SFDP dump is still missing as requested in my comment in v4. = Please make sure you put it in the comment section of the patch, that is un= der the "---" line. Then I think, this patch is good. >>>>> Sure will add SFDP dump. -michael