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From:   =?windows-1254?Q?Alvin_=8Aipraga?= <ALSI@bang-olufsen.dk>
To:     Rob Herring <robh@kernel.org>
CC:     Luiz Angelo Daros de Luca <luizluca@gmail.com>,
        Linus Walleij <linus.walleij@linaro.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        Arnd Bergmann <arnd@arndb.de>, Olof Johansson <olof@lixom.net>,
        =?windows-1254?Q?Ar=FDn=E7_=DCNAL?= <arinc.unal@arinc9.com>,
        Florian Fainelli <f.fainelli@gmail.com>,
        Stephen Rothwell <sfr@canb.auug.org.au>,
        Andrew Lunn <andrew@lunn.ch>,
        Vivien Didelot <vivien.didelot@gmail.com>,
        Vladimir Oltean <olteanv@gmail.com>,
        "David S . Miller" <davem@davemloft.net>,
        Jakub Kicinski <kuba@kernel.org>,
        "open list:NETWORKING DRIVERS" <netdev@vger.kernel.org>,
        open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] dt-bindings: net: dsa: realtek-smi: convert to YAML
 schema
Thread-Topic: [PATCH] dt-bindings: net: dsa: realtek-smi: convert to YAML
 schema
Thread-Index: AQHX+7x190ifeZKfKUO5Ng/OWHmcTQ==
Date:   Wed, 9 Feb 2022 16:49:20 +0000
Message-ID: <87zgn0gf3k.fsf@bang-olufsen.dk>
References: <20211228072645.32341-1-luizluca@gmail.com>
        <Ydx4+o5TsWZkZd45@robh.at.kernel.org>
        <CAJq09z4G40ttsTHXtOywjyusNLSjt_BQ9D78PhwSodJr=4p6OA@mail.gmail.com>
        <CAL_JsqJ4SsEzZz=JfFMDDUMXEDfybMZw4BVDcj1MoapM+8jQwg@mail.gmail.com>
In-Reply-To: <CAL_JsqJ4SsEzZz=JfFMDDUMXEDfybMZw4BVDcj1MoapM+8jQwg@mail.gmail.com>       (Rob
 Herring's message of "Wed, 9 Feb 2022 09:28:59 -0600")
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Hi,

Rob Herring <robh@kernel.org> writes:

>> >
>> > > +
>> > > +      interrupts:
>> > > +        description: TODO
>> >
>> > You have to define how many interrupts and what they are.
>>
>> I didn't write the interruption code and Linus and Alvin might help here=
.
>>
>> The switch has a single interrupt pin that signals an interruption happe=
ned.
>
> Then it's 1 interrupt?

Correct. The switch has one physcical interrupt signal.

>
>> The code reads a register to multiplex to these interruptions:
>>
>> INT_TYPE_LINK_STATUS =3D 0,
>> INT_TYPE_METER_EXCEED,
>> INT_TYPE_LEARN_LIMIT,
>> INT_TYPE_LINK_SPEED,
>> INT_TYPE_CONGEST,
>> INT_TYPE_GREEN_FEATURE,
>> INT_TYPE_LOOP_DETECT,
>> INT_TYPE_8051,
>> INT_TYPE_CABLE_DIAG,
>> INT_TYPE_ACL,
>> INT_TYPE_RESERVED, /* Unused */
>> INT_TYPE_SLIENT,
>
> Unless the DT needs to route all these interrupts to multiple nodes,
> then the switch needs to be an interrupt-controller.

Yes, it is an interrupt-controller, and an interrupt-parent to the phy
nodes.

>
>>
>> And most of them, but not all, multiplex again to each port.
>
> Now I'm lost. So it's 1 per port, not 1 for the switch?

There is one physical interrupt signal for these switches. In the switch
driver IRQ handler, some registers are inspected to decide what type of
event it is. Luiz pasted the enum of possible interrupt types in his
mail above. Most of these events are ignored, or are otherwise internal
to the switch driver. But in some cases, the interrupt is actually for
one of the embedded PHYs in the switch. That's why we make the switch
an interrupt-controller.

So, in summary:

 - one interrupt for the switch
 - the switch is an interrupt-controller
 - ... and is the interrupt-parent for the phy nodes.

The rest is internal details and shouldn't matter, as far as my
understanding of device tree bindings goes. Happy to be corrected
though.

Kind regards,
Alvin=