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[173.173.107.246]) by smtp.gmail.com with ESMTPSA id a15sm7127523oil.13.2022.02.09.11.14.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 09 Feb 2022 11:14:26 -0800 (PST) Message-ID: <72fa3837-1792-9a45-c1c2-7863d3381c31@kali.org> Date: Wed, 9 Feb 2022 13:14:24 -0600 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.5.1 Subject: Re: [v1 2/2] clk: qcom: dispcc: Update gdsc flag for display GDSC Content-Language: en-US To: Taniya Das , Stephen Boyd , Michael Turquette Cc: Rajendra Nayak , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org References: <20220209172513.17873-1-tdas@codeaurora.org> <20220209172513.17873-2-tdas@codeaurora.org> From: Steev Klimaszewski In-Reply-To: <20220209172513.17873-2-tdas@codeaurora.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,RDNS_NONE,SPF_HELO_NONE, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Taniya, On 2/9/22 11:25 AM, Taniya Das wrote: > Update the mdss gdsc flag for SC7180/SC7280/SM8150/SM8250 > to not program the transition delay. > > Fixes: dd3d06622138 ("clk: qcom: Add display clock controller driver for SC7180") > Fixes: 1a00c962f9cd ("clk: qcom: Add display clock controller driver for SC7280") > Fixes: 80a18f4a8567 ("clk: qcom: Add display clock controller driver for SM8150 and SM8250") > Signed-off-by: Taniya Das > --- > drivers/clk/qcom/dispcc-sc7180.c | 2 +- > drivers/clk/qcom/dispcc-sc7280.c | 2 +- > drivers/clk/qcom/dispcc-sm8250.c | 2 +- > 3 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/clk/qcom/dispcc-sc7180.c b/drivers/clk/qcom/dispcc-sc7180.c > index 538e4963c915..c203888ab2ca 100644 > --- a/drivers/clk/qcom/dispcc-sc7180.c > +++ b/drivers/clk/qcom/dispcc-sc7180.c > @@ -629,7 +629,7 @@ static struct gdsc mdss_gdsc = { > .name = "mdss_gdsc", > }, > .pwrsts = PWRSTS_OFF_ON, > - .flags = HW_CTRL, > + .flags = HW_CTRL | DEFAULT_TRANSITION_DELAY, > }; There's an extra space after the | > static struct gdsc *disp_cc_sc7180_gdscs[] = { > diff --git a/drivers/clk/qcom/dispcc-sc7280.c b/drivers/clk/qcom/dispcc-sc7280.c > index 4ef4ae231794..8e1a2d4a8120 100644 > --- a/drivers/clk/qcom/dispcc-sc7280.c > +++ b/drivers/clk/qcom/dispcc-sc7280.c > @@ -791,7 +791,7 @@ static struct gdsc disp_cc_mdss_core_gdsc = { > .name = "disp_cc_mdss_core_gdsc", > }, > .pwrsts = PWRSTS_OFF_ON, > - .flags = HW_CTRL | RETAIN_FF_ENABLE, > + .flags = HW_CTRL | RETAIN_FF_ENABLE | DEFAULT_TRANSITION_DELAY, > }; > > static struct clk_regmap *disp_cc_sc7280_clocks[] = { > diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c > index 566fdfa0a15b..4d64d499a285 100644 > --- a/drivers/clk/qcom/dispcc-sm8250.c > +++ b/drivers/clk/qcom/dispcc-sm8250.c > @@ -1130,7 +1130,7 @@ static struct gdsc mdss_gdsc = { > .name = "mdss_gdsc", > }, > .pwrsts = PWRSTS_OFF_ON, > - .flags = HW_CTRL, > + .flags = HW_CTRL | DEFAULT_TRANSITION_DELAY, > .supply = "mmcx", > }; > > -- > Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member > of the Code Aurora Forum, hosted by the Linux Foundation. > -- steev