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From:   Vladimir Oltean <vladimir.oltean@nxp.com>
To:     Qing Wang <wangqing@vivo.com>
CC:     Claudiu Manoil <claudiu.manoil@nxp.com>,
        Alexandre Belloni <alexandre.belloni@bootlin.com>,
        "UNGLinuxDriver@microchip.com" <UNGLinuxDriver@microchip.com>,
        Andrew Lunn <andrew@lunn.ch>,
        Vivien Didelot <vivien.didelot@gmail.com>,
        Florian Fainelli <f.fainelli@gmail.com>,
        "David S. Miller" <davem@davemloft.net>,
        Jakub Kicinski <kuba@kernel.org>,
        "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] net: dsa: ocelot: use div64_u64() instead of do_div()
Thread-Topic: [PATCH] net: dsa: ocelot: use div64_u64() instead of do_div()
Thread-Index: AQHYHZCIgJv9QyxGa0GdYVat4ijKrKyLEV2A
Date:   Wed, 9 Feb 2022 11:14:47 +0000
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References: <1644395942-4186-1-git-send-email-wangqing@vivo.com>
In-Reply-To: <1644395942-4186-1-git-send-email-wangqing@vivo.com>
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Hi Wang,

On Wed, Feb 09, 2022 at 12:39:02AM -0800, Qing Wang wrote:
> From: Wang Qing <wangqing@vivo.com>
>=20
> do_div() does a 64-by-32 division.
> When the divisor is u64, do_div() truncates it to 32 bits, this means it
> can test non-zero and be truncated to zero for division.
>=20
> fix do_div.cocci warning:
> do_div() does a 64-by-32 division, please consider using div64_u64 instea=
d.
>=20
> Signed-off-by: Wang Qing <wangqing@vivo.com>
> ---
>  drivers/net/dsa/ocelot/felix_vsc9959.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>=20
> diff --git a/drivers/net/dsa/ocelot/felix_vsc9959.c b/drivers/net/dsa/oce=
lot/felix_vsc9959.c
> index bf8d382..5c2482f
> --- a/drivers/net/dsa/ocelot/felix_vsc9959.c
> +++ b/drivers/net/dsa/ocelot/felix_vsc9959.c
> @@ -1178,7 +1178,7 @@ static void vsc9959_new_base_time(struct ocelot *oc=
elot, ktime_t base_time,
>  	if (base_time < current_time) {
>  		u64 nr_of_cycles =3D current_time - base_time;
> =20
> -		do_div(nr_of_cycles, cycle_time);
> +		div64_u64(nr_of_cycles, cycle_time);
>  		new_base_time +=3D cycle_time * (nr_of_cycles + 1);
>  	}
> =20
> --=20
> 2.7.4
>

I would prefer that you teach your scripts that, if a range check exists
for the divisor prior to the division, it gets taken into consideration.

vsc9959_qos_port_tas_set:

	if (taprio->cycle_time > NSEC_PER_SEC ||
	    taprio->cycle_time_extension >=3D NSEC_PER_SEC)
		return -EINVAL;

	vsc9959_new_base_time(ocelot, taprio->base_time,
			      taprio->cycle_time, &base_ts);

vsc9959_psfp_sgi_set:

	if (sgi->cycletime < VSC9959_PSFP_GATE_CYCLETIME_MIN ||
	    sgi->cycletime > NSEC_PER_SEC)
		return -EINVAL;

	vsc9959_new_base_time(ocelot, sgi->basetime, sgi->cycletime, &base_ts);

So all callers provide a cycle_time argument that is smaller than
NSEC_PER_SEC (1000000000L =3D 0x3B9ACA00 =3D> fits on 32 bits).=