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Message-ID: <167d6936-66a2-2953-702d-b269bc26fc7d@canonical.com>
Date:   Wed, 9 Feb 2022 22:36:41 +0100
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Subject: Re: [PATCH 4/5] arm64: dts: ti: Introduce base support for AM62x SoC
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To:     Vignesh Raghavendra <vigneshr@ti.com>, Nishanth Menon <nm@ti.com>,
        Tero Kristo <kristo@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Santosh Shilimkar <ssantosh@kernel.org>
Cc:     linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
References: <20220208131827.1430086-1-vigneshr@ti.com>
 <20220208131827.1430086-5-vigneshr@ti.com>
 <3221dd42-7a14-7ac6-0b61-634a77a45753@canonical.com>
 <b32d1d4b-4188-2e35-6242-5217f1d955d7@ti.com>
From:   Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
In-Reply-To: <b32d1d4b-4188-2e35-6242-5217f1d955d7@ti.com>
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Precedence: bulk

On 09/02/2022 20:04, Vignesh Raghavendra wrote:
> Hi Krzysztof,
> 
> On 08/02/22 10:35 pm, Krzysztof Kozlowski wrote:
> [...]
>>
>> (...)
>>
>>> diff --git a/arch/arm64/boot/dts/ti/k3-am62.dtsi b/arch/arm64/boot/dts/ti/k3-am62.dtsi
>>> new file mode 100644
>>> index 000000000000..f1a46be27c37
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/ti/k3-am62.dtsi
>>> @@ -0,0 +1,104 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +/*
>>> + * Device Tree Source for AM62 SoC Family
>>> + *
>>> + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
>>> + */
>>> +
>>> +#include <dt-bindings/gpio/gpio.h>
>>> +#include <dt-bindings/interrupt-controller/irq.h>
>>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>>> +#include <dt-bindings/pinctrl/k3.h>
>>> +#include <dt-bindings/soc/ti,sci_pm_domain.h>
>>> +
>>> +/ {
>>> +	model = "Texas Instruments K3 AM625 SoC";
>>> +	compatible = "ti,am625";
>>
>> This is am625, but the file is am62. Why having the split?
> 
> 
> Hierarchy is:
> 
> am62.dtsi:
> -> base SoC skeleton ie arch timers and interconnects which is common
> across am62xx family of SoCs
>  -> includes am62-main.dtsi, am62-mcu.dtsi and am62-wakeup.dtsi
> representing 3 domains and peripherals in each of these domain
> -> describes all peripherals in the family (except CPU cluster)
> 
> 
> am625.dtsi:
> -> describes CPU cluster (Quad A53s). Since, am625 is a current superset
> device with all peripherals, am625.dtsi includes am62.dtsi completing
> SoC definition.
> -> individual EVMs using this SoC will just need to include am625.dtsi
> thus making things easier for Board and SOM Vendors.
> 
> 
> In future:
> am62{1-9}{1-9}.dtsi:
> -> Includes am625.dtsi
> -> Overrides top compatible: ti,am62{1-9}{1-9}
> -> disables CPUs and peripherals not present (cutdowns of current SoC).
> -> -> individual EVM dts files using this SoC will just need to include
> am625.dtsi as starting point, thus making things easier for Board and
> SOM Vendors.
> 
> Top level compatible is set to "ti,am625.dtsi" which is first device in
> family and superset.
> 
> Hope this clears up? Will add this to commit msg
> 

Hm, if I understand correctly: you might have later some future
am6211.dtsi which includes am625.dtsi and in general is compatible with
am625 but with disabled parts?

It's as bit counter-intuitive - I expect compatible to be extended
instead of overridden. But it looks also ok, if you build entire design
around it.

Best regards,
Krzysztof