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Date:   Thu, 10 Feb 2022 01:04:39 +0100
From:   Andrew Lunn <andrew@lunn.ch>
To:     Tim Harvey <tharvey@gateworks.com>
Cc:     Martin Schiller <ms@dev.tdt.de>, Hauke Mehrtens <hauke@hauke-m.de>,
        martin.blumenstingl@googlemail.com,
        Florian Fainelli <f.fainelli@gmail.com>, hkallweit1@gmail.com,
        Russell King - ARM Linux <linux@armlinux.org.uk>,
        David Miller <davem@davemloft.net>, kuba@kernel.org,
        netdev <netdev@vger.kernel.org>,
        open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH net v3] net: phy: intel-xway: enable integrated led
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> The errata can be summarized as:
> - 1 out of 100 boots or cable plug events RGMII GbE link will end up
> going down and up 3 to 4 times then resort to a 100m link; workaround
> has been found to require a pin level reset

So that sounds like it is downshifting because it thinks there is a
broken pair. Can you disable downshift? Problem is, that might just
result in link down.

> - 1 out of 100 boots or cable plug events (varies per board) SGMII
> will fail link between the MAC and PHY; workaround has been found to
> require a pin level reset

I don't suppose there is a register to restart SGMII sync?  Sometimes
there is.

Anyway, shared reset makes this messy, as you said. Unfortunate
design. But i don't see how you can work around this in the
bootloader, especially the cable plug events.

	Andrew