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From:   Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
To:     Bjorn Helgaas <bhelgaas@google.com>,
        Rob Herring <robh+dt@kernel.org>,
        Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= <kw@linux.com>,
        Masami Hiramatsu <mhiramat@kernel.org>
Cc:     linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Subject: [PATCH v3 0/3] PCI: Introduce UniPhier NX1 PCI endpoint controller support
Date:   Thu, 10 Feb 2022 17:09:53 +0900
Message-Id: <1644480596-20037-1-git-send-email-hayashi.kunihiko@socionext.com>
Precedence: bulk

This series includes the patches to add basic support for the PCI endpoint
controller implemented in NX1 SoC.

This defines SoC-dependent data to distinguish existing functions and flags
for Pro5 and NX1 SoCs.

Changes since v2:
- Add .init(), .wait(), and has_gio to SoC-dependent data instead of
  "is_legacy" flag
- Rename uniphier_pcie_init_ep_legacy() with uniphier_pcie_pro5_init_ep()
- Rename uniphier_pcie_init_ep() and uniphier_pcie_wait_ep() with
  uniphier_pcie_nx1_init_ep() and uniphier_pcie_nx1_wait_ep()
- Add Reviewed-by: lines

Changes since v1:
- Fix dt-bindings warnings

Kunihiko Hayashi (3):
  dt-bindings: PCI: uniphier-ep: Add bindings for NX1 SoC
  PCI: uniphier-ep: Add SoC data structure
  PCI: uniphier-ep: Add NX1 support

 .../bindings/pci/socionext,uniphier-pcie-ep.yaml   |  22 +++-
 drivers/pci/controller/dwc/pcie-uniphier-ep.c      | 142 ++++++++++++++++++---
 2 files changed, 138 insertions(+), 26 deletions(-)

-- 
2.7.4