Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
In-Reply-To: <YgRBnExwlzI+lPlR@builder.lan>
References: <20220209172513.17873-1-tdas@codeaurora.org> <YgRBnExwlzI+lPlR@builder.lan>
Subject: Re: [v1 1/2] clk: qcom: gdsc: Use the default transition delay for GDSCs
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     Michael Turquette <mturquette@baylibre.com>,
        Rajendra Nayak <rnayak@codeaurora.org>,
        linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
To:     Bjorn Andersson <bjorn.andersson@linaro.org>,
        Taniya Das <tdas@codeaurora.org>
Date:   Wed, 09 Feb 2022 23:28:40 -0800
User-Agent: alot/0.10
Message-Id: <20220210072842.3E796C004E1@smtp.kernel.org>
Precedence: bulk

Quoting Bjorn Andersson (2022-02-09 14:35:08)
> On Wed 09 Feb 11:25 CST 2022, Taniya Das wrote:
>=20
> > Do not update the transition delay and use the default reset values.
> >=20
> > Fixes: 45dd0e55317cc ("clk: qcom: Add support for GDSCs)
> > Signed-off-by: Taniya Das <tdas@codeaurora.org>
> > ---
> >  drivers/clk/qcom/gdsc.c | 6 +++++-
> >  drivers/clk/qcom/gdsc.h | 1 +
> >  2 files changed, 6 insertions(+), 1 deletion(-)
> >=20
> > diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c
> > index 7e1dd8ccfa38..e7b213450640 100644
> > --- a/drivers/clk/qcom/gdsc.c
> > +++ b/drivers/clk/qcom/gdsc.c
> > @@ -380,7 +380,11 @@ static int gdsc_init(struct gdsc *sc)
> >        */
> >       mask =3D HW_CONTROL_MASK | SW_OVERRIDE_MASK |
> >              EN_REST_WAIT_MASK | EN_FEW_WAIT_MASK | CLK_DIS_WAIT_MASK;
> > -     val =3D EN_REST_WAIT_VAL | EN_FEW_WAIT_VAL | CLK_DIS_WAIT_VAL;
> > +
> > +     regmap_read(sc->regmap, sc->gdscr, &val);
> > +
> > +     if (!(sc->flags & DEFAULT_TRANSITION_DELAY))
>=20
> I dug a little bit more into this and noticed that on various platforms
> CLK_DIS_WAIT_VAL for the GPU_CX GDSC is supposed to be 8 (whereas both
> hw default and CLK_DIS_WAIT_VAL is 2).
>=20
> I'm not able to find anything helpful in the git log describing what the
> value does, but it seems that a "just use hw default" flag won't cut it
> for this scenario.
>=20

I'd prefer we invert the logic so that we don't need to litter this flag
all over the place. I recall that the wait values were incorrect a long
time ago on early gdsc using designs but hopefully they've been fixed
now and we can simply use the default power on reset (POR) values.