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From:   Arnd Bergmann <arnd@arndb.de>
Date:   Thu, 10 Feb 2022 17:30:15 +0100
Message-ID: <CAK8P3a29uJF+dVVjuKmF=rRDJrM2ndbxRJPFt9ga-waQcECb+A@mail.gmail.com>
Subject: Re: [PATCH 0/4] soc: Add support for Marvell OcteonTX2 SDP block
To:     Radha Mohan Chintakuntla <radhac@marvell.com>
Cc:     Linux ARM <linux-arm-kernel@lists.infradead.org>,
        Arnd Bergmann <arnd@arndb.de>,
        Linus Walleij <linus.walleij@linaro.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        sburla@marvell.com
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On Wed, Feb 9, 2022 at 11:42 PM Radha Mohan Chintakuntla
<radhac@marvell.com> wrote:
>
> The Marvell OcteonTX2's SDP block is a interface for sending and receiving
> ethernet packets over the PCIe interface when OcteonTX2 is in PCIe endpoint
> mode. It interfaces with the OcteonTX2's NIX block queues.

Hi Radha,

I'm not sure drivers/soc/ is the right place for it. I have not done an
actual review so far, but I have some high-level questions to
clarify how this fits in:

When you say it is meant for passing ethernet packets, why is
it not an ethernet driver?

If this drives the PCIe endpoint mode, how does it interface with
the pci endpoint framework? It looks like a normal PCI driver.

What hardware does this run on? Is this only usable when
both the host side and the endpoint side are Octexon TX2
machines with their packet engines, or can one of the two
be a different machine that has PCIe host or endpoint device
support?

          Arnd