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The number of bits consumed by hardware is model > specific, e.g. early CPUs ignored bits 11:8, but there is no way for KVM > to enumerate the "true" size. So, KVM must allow using all bits, else it > risks rejecting completely legal x2APIC IDs on newer CPUs. > > This means KVM relies on hardware to not assign x2APIC IDs that exceed the > "true" width of the field, but presmuably hardware is smart enough to tie > the width to the max x2APIC ID. KVM also relies on hardware to support at > least 8 bits, as the legacy xAPIC ID is writable by software. But, those > assumptions are unavoidable due to the lack of any way to enumerate the > "true" width. > > Note, older versions of the APM state that bits 11:8 are reserved for > legacy xAPIC, but consumed for x2APIC. Revision 3.38 corrected this to > state that bits 11:8 are "should be zero" on older hardware. This last paragraph is incorrect. The APM revision 3.38 and prior states Reserved/SBZ for legacy APIC; extension of Host Physical APIC ID when x2APIC is enabled. Here, "SBZ" means Should Be Zero. Therefore, I will remove the last paragraph in V6. Suravee