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[2620:137:e000::1:20]) by mx.google.com with ESMTP id f29si17888516ejj.875.2022.02.12.23.30.00; Sat, 12 Feb 2022 23:30:46 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351507AbiBKQ2q (ORCPT + 93 others); Fri, 11 Feb 2022 11:28:46 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:60308 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343604AbiBKQ2o (ORCPT ); Fri, 11 Feb 2022 11:28:44 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id DA8E5BD1; Fri, 11 Feb 2022 08:28:42 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A2CA3106F; Fri, 11 Feb 2022 08:28:42 -0800 (PST) Received: from e123427-lin.arm.com (unknown [10.57.37.139]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 97C553F70D; Fri, 11 Feb 2022 08:28:40 -0800 (PST) From: Lorenzo Pieralisi To: Bjorn Helgaas , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Kunihiko Hayashi , Masami Hiramatsu , Rob Herring Cc: Lorenzo Pieralisi , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org Subject: Re: [PATCH v3 0/3] PCI: Introduce UniPhier NX1 PCI endpoint controller support Date: Fri, 11 Feb 2022 16:28:33 +0000 Message-Id: <164459688629.18091.18363501348451518147.b4-ty@arm.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <1644480596-20037-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1644480596-20037-1-git-send-email-hayashi.kunihiko@socionext.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 10 Feb 2022 17:09:53 +0900, Kunihiko Hayashi wrote: > This series includes the patches to add basic support for the PCI endpoint > controller implemented in NX1 SoC. > > This defines SoC-dependent data to distinguish existing functions and flags > for Pro5 and NX1 SoCs. > > Changes since v2: > - Add .init(), .wait(), and has_gio to SoC-dependent data instead of > "is_legacy" flag > - Rename uniphier_pcie_init_ep_legacy() with uniphier_pcie_pro5_init_ep() > - Rename uniphier_pcie_init_ep() and uniphier_pcie_wait_ep() with > uniphier_pcie_nx1_init_ep() and uniphier_pcie_nx1_wait_ep() > - Add Reviewed-by: lines > > [...] Applied to pci/uniphier, thanks! [1/3] dt-bindings: PCI: uniphier-ep: Add bindings for NX1 SoC https://git.kernel.org/lpieralisi/pci/c/f28b24042b [2/3] PCI: uniphier-ep: Add SoC data structure https://git.kernel.org/lpieralisi/pci/c/d41584ae86 [3/3] PCI: uniphier-ep: Add NX1 support https://git.kernel.org/lpieralisi/pci/c/892fdf15b8 Thanks, Lorenzo