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Subject: Re: [PATCH v6 14/14] riscv: add memory-type errata for T-Head
To:     Heiko Stuebner <heiko@sntech.de>, palmer@dabbelt.com,
        paul.walmsley@sifive.com, aou@eecs.berkeley.edu
Cc:     linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, robh+dt@kernel.org, wefu@redhat.com,
        liush@allwinnertech.com, guoren@kernel.org, atishp@atishpatra.org,
        anup@brainfault.org, drew@beagleboard.org, hch@lst.de,
        arnd@arndb.de, wens@csie.org, maxime@cerno.tech,
        gfavor@ventanamicro.com, andrea.mondelli@huawei.com,
        behrensj@mit.edu, xinhaoqu@huawei.com, huffman@cadence.com,
        mick@ics.forth.gr, allen.baum@esperantotech.com,
        jscheid@ventanamicro.com, rtrauben@gmail.com, cmuellner@linux.com,
        philipp.tomsich@vrull.eu
References: <20220209123800.269774-1-heiko@sntech.de>
 <20220209123800.269774-15-heiko@sntech.de>
From:   Samuel Holland <samuel@sholland.org>
Message-ID: <0f5e7f77-abe9-046e-7296-2f22cb7e5b86@sholland.org>
Date:   Sun, 13 Feb 2022 21:42:11 -0600
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On 2/9/22 6:38 AM, Heiko Stuebner wrote:
> Some current cpus based on T-Head cores implement memory-types
> way different than described in the svpbmt spec even going
> so far as using PTE bits marked as reserved.
> 
> Add the T-Head vendor-id and necessary errata code to
> replace the affected instructions.
> 
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Samuel Holland <samuel@sholland.org>