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Date:   Mon, 14 Feb 2022 11:41:14 +0000
Message-ID: <87mtit4qw5.wl-maz@kernel.org>
From:   Marc Zyngier <maz@kernel.org>
To:     Kalesh Singh <kaleshsingh@google.com>
Cc:     will@kernel.org, qperret@google.com, tabba@google.com,
        surenb@google.com, kernel-team@android.com,
        Catalin Marinas <catalin.marinas@arm.com>,
        James Morse <james.morse@arm.com>,
        Alexandru Elisei <alexandru.elisei@arm.com>,
        Suzuki K Poulose <suzuki.poulose@arm.com>,
        Ard Biesheuvel <ardb@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Pasha Tatashin <pasha.tatashin@soleen.com>,
        Joey Gouly <joey.gouly@arm.com>,
        Peter Collingbourne <pcc@google.com>,
        Andrew Walbran <qwandor@google.com>,
        Andrew Scull <ascull@google.com>,
        Paolo Bonzini <pbonzini@redhat.com>,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        kvmarm@lists.cs.columbia.edu
Subject: Re: [PATCH 0/7] KVM: arm64: Hypervisor stack enhancements
In-Reply-To: <20220210224220.4076151-1-kaleshsingh@google.com>
References: <20220210224220.4076151-1-kaleshsingh@google.com>
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On Thu, 10 Feb 2022 22:41:41 +0000,
Kalesh Singh <kaleshsingh@google.com> wrote:
> 
> This series is based on v5.17-rc3 and adds the following stack features to
> the KVM nVHE hypervisor:
> 
> == Hyp Stack Guard Pages ==
> 
> Based on the technique used by arm64 VMAP_STACK to detect overflow.
> i.e. the stack is aligned to twice its size which ensure that the 
> 'stack shift' bit of any valid SP is 0. The 'stack shift' bit can be
> tested in the exception entry to detect overflow without corrupting GPRs.

Having quickly parsed the code, this seems to only be effective for
pKVM and the EL2-allocated stack. Is there any technical reason not to
implement this for the much more common case of 'classic' KVM in nVHE
mode?

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.