Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18;
From:   Colin Foster <colin.foster@in-advantage.com>
To:     linux-kernel@vger.kernel.org, netdev@vger.kernel.org
Cc:     Jakub Kicinski <kuba@kernel.org>,
        "David S. Miller" <davem@davemloft.net>,
        UNGLinuxDriver@microchip.com,
        Alexandre Belloni <alexandre.belloni@bootlin.com>,
        Claudiu Manoil <claudiu.manoil@nxp.com>,
        Vladimir Oltean <vladimir.oltean@nxp.com>
Subject: [PATCH v7 net-next 2/4] net: ocelot: align macros for consistency
Date:   Sun, 13 Feb 2022 11:12:52 -0800
Message-Id: <20220213191254.1480765-3-colin.foster@in-advantage.com>
In-Reply-To: <20220213191254.1480765-1-colin.foster@in-advantage.com>
References: <20220213191254.1480765-1-colin.foster@in-advantage.com>
Content-Transfer-Encoding: 8bit
Content-Type: text/plain
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?4xr7Pqb3LtmMBM1QiFvkdzdEoRX2XPuEof+4ke6LJ91tPPbLiYnuNtJNsv9/?=
 =?us-ascii?Q?dQVMQt1smsnO35QJ5cgmRBYPdVlCFpeqh2r4saJ654UqegnWgvxaI6KxZZEo?=
 =?us-ascii?Q?ZtVt2FLxV5ZGnL2YFPgCG9ny1wLx8OmD6fHrvaLE0cmyOzUi6oVElqy3wikk?=
 =?us-ascii?Q?8suv8XkiOVSgr+AMBN11MNHFEQnmWNcMyB3dY3Rq9xR+0oIJSzeXusHqPBA2?=
 =?us-ascii?Q?+/992RhYFXnqE23RUTXR5s+ElOUrX83GqkGjr9wwxSVC3pUDGZvhbCgnc1Lz?=
 =?us-ascii?Q?KvF/b/DkXZHbJZSq5ndwyRqoI4zBvFAPCoPowjSbgOtvIg2vKnn5PffTRoXB?=
 =?us-ascii?Q?Y9116J+1I0+ZthqJmR89gs5bDj4dqY9Q4CcinkYa2CyWqeHSEpXctEl8kXMk?=
 =?us-ascii?Q?408LglKe/LJJYRABPplLIyk7Im4NYw69BkyLsc529Yb/0U+mPgYTMvMUgHmq?=
 =?us-ascii?Q?NGpYpeI9mMaT0x8GIoTxB8uOVgCxyfvajphfUZ8M1CakD1izVAift/uWBYBR?=
 =?us-ascii?Q?8BXdPLNHY/PiaK+/32Tg7O24soClVyGx+w3ZrojZ86fvmuVv0ir0ZjwHR6Rx?=
 =?us-ascii?Q?bShkk8YYsR7/hrrHP1i5O/F7DWLdCFQaJ6uC+n+zsrXpojb6qksU0ERC7OFU?=
 =?us-ascii?Q?0vqfdhlFSSDzQPnpoXDjYTqChyiUVDrCHl/BVnGdRfOO/AE8wPWR59CgPnAo?=
 =?us-ascii?Q?MoQD7VcQZW5jeITbWBno+VNXAERQ02U5mzV0hfJ5y2CkCgEc0xXMPXBNLY4v?=
 =?us-ascii?Q?piAHuJMdjNCAhqaAkE/xhyfhU3NPCB1/vuo0tQt0E/Acc/wIyvcC0LXRtN1w?=
 =?us-ascii?Q?Xx3Iy6uiu+FnVckePH0meNElvdkeokcHdnPXeYjtJRRuhnfZfGjcjlWoLLFM?=
 =?us-ascii?Q?uQZ0QdaI90tnEutAZnkb1ZwbmFWq41EmQObqwIXHPcY/iETj73SQAhJ9GVEJ?=
 =?us-ascii?Q?4IzjNPBtgd1h5tIrrLNcF0RxVt72qqzhyRxXF/LYu8H9vgAc2qkYvXRG0Ftn?=
 =?us-ascii?Q?X1p07yuxJRGWbIZ4SpMmQBjW68rlK180bEJjPzSammEwSskIk1HPrcz0s/r3?=
 =?us-ascii?Q?fX0sWzpa3cIhNbpoz3C9nveoaMsg9fUfMjieU7V39gEuYxetnPbC78pkjXjI?=
 =?us-ascii?Q?mYcrHuriFsxeIm27uF9EJs333GGsS3bnM3WqTO7YgaNkUUhraVDoKt3KjoPI?=
 =?us-ascii?Q?wzQ2V2udRvCCAhW5rj6ErN5nkiqmSHdiVQpKNupi/dtsHNSQHlNU43+9LYvS?=
 =?us-ascii?Q?KPx/rZqHJl779LxTUgG3JB3vJ0IY8OANhQ4jHX8VqsG2scYyAIHyntRj3zin?=
 =?us-ascii?Q?txw3eZokZDGjjyd5tBEYmcXAuS6WMmqNzMCKM8JI5X18mX24YBduOA+8ESlO?=
 =?us-ascii?Q?9SVd/94L1DmxWTohjYCmfR6i/A1ol1oTgnz5bC2QI8zmRv6m85Fo4XeYh1St?=
 =?us-ascii?Q?z//Z/zsefvjBUl2k2eyWgJCf2IDKdlYwfO+dQ1vrdEFdUr6fHEG1XudbIfOK?=
 =?us-ascii?Q?YxcmmlAILCH4xnOm7fpwJrJdF07MnfpII27f7qRmtRp4kalUGNYe9JKfXqau?=
 =?us-ascii?Q?da2rX4hcvzy8k7HpSkXvyxYl3ciBnw1SHpYvny8lq1vmdDI6Qr/gzWwDpHF3?=
 =?us-ascii?Q?nO09d3ZbDcLqgmx//CMKjoFIni9vl7JE3JyiQGCjW9mFObq1ZGNfLwzZSlj7?=
 =?us-ascii?Q?LB7awA=3D=3D?=
X-OriginatorOrg: in-advantage.com
X-MS-Exchange-CrossTenant-Network-Message-Id: 3372135a-1ff8-4242-96ec-08d9ef24dca2
X-MS-Exchange-CrossTenant-AuthSource: MWHPR1001MB2351.namprd10.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2022 19:13:05.0389
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 48e842ca-fbd8-4633-a79d-0c955a7d3aae
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: I7bEBNJAIBFEiycxDiIk4V2hMID+0FfkHngK5+z1BHfTRAIXzoi1jEFhUuMBI4Bv7PZekwr0F2h20E23NuplEOFRjlgr4OoOe5JcxrvvgtY=
X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR10MB3315
X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,
	DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RDNS_NONE,
	SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no
	version=3.4.6
X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on
	lindbergh.monkeyblade.net
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

In the ocelot.h file, several read / write macros were split across
multiple lines, while others weren't. Split all macros that exceed the 80
character column width and match the style of the rest of the file.

Signed-off-by: Colin Foster <colin.foster@in-advantage.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
 include/soc/mscc/ocelot.h | 44 ++++++++++++++++++++++++++-------------
 1 file changed, 29 insertions(+), 15 deletions(-)

diff --git a/include/soc/mscc/ocelot.h b/include/soc/mscc/ocelot.h
index 62cd61d4142e..14a6f4de8e1f 100644
--- a/include/soc/mscc/ocelot.h
+++ b/include/soc/mscc/ocelot.h
@@ -744,25 +744,39 @@ struct ocelot_policer {
 	u32 burst; /* bytes */
 };
 
-#define ocelot_read_ix(ocelot, reg, gi, ri) __ocelot_read_ix(ocelot, reg, reg##_GSZ * (gi) + reg##_RSZ * (ri))
-#define ocelot_read_gix(ocelot, reg, gi) __ocelot_read_ix(ocelot, reg, reg##_GSZ * (gi))
-#define ocelot_read_rix(ocelot, reg, ri) __ocelot_read_ix(ocelot, reg, reg##_RSZ * (ri))
-#define ocelot_read(ocelot, reg) __ocelot_read_ix(ocelot, reg, 0)
-
-#define ocelot_write_ix(ocelot, val, reg, gi, ri) __ocelot_write_ix(ocelot, val, reg, reg##_GSZ * (gi) + reg##_RSZ * (ri))
-#define ocelot_write_gix(ocelot, val, reg, gi) __ocelot_write_ix(ocelot, val, reg, reg##_GSZ * (gi))
-#define ocelot_write_rix(ocelot, val, reg, ri) __ocelot_write_ix(ocelot, val, reg, reg##_RSZ * (ri))
+#define ocelot_read_ix(ocelot, reg, gi, ri) \
+	__ocelot_read_ix(ocelot, reg, reg##_GSZ * (gi) + reg##_RSZ * (ri))
+#define ocelot_read_gix(ocelot, reg, gi) \
+	__ocelot_read_ix(ocelot, reg, reg##_GSZ * (gi))
+#define ocelot_read_rix(ocelot, reg, ri) \
+	__ocelot_read_ix(ocelot, reg, reg##_RSZ * (ri))
+#define ocelot_read(ocelot, reg) \
+	__ocelot_read_ix(ocelot, reg, 0)
+
+#define ocelot_write_ix(ocelot, val, reg, gi, ri) \
+	__ocelot_write_ix(ocelot, val, reg, reg##_GSZ * (gi) + reg##_RSZ * (ri))
+#define ocelot_write_gix(ocelot, val, reg, gi) \
+	__ocelot_write_ix(ocelot, val, reg, reg##_GSZ * (gi))
+#define ocelot_write_rix(ocelot, val, reg, ri) \
+	__ocelot_write_ix(ocelot, val, reg, reg##_RSZ * (ri))
 #define ocelot_write(ocelot, val, reg) __ocelot_write_ix(ocelot, val, reg, 0)
 
-#define ocelot_rmw_ix(ocelot, val, m, reg, gi, ri) __ocelot_rmw_ix(ocelot, val, m, reg, reg##_GSZ * (gi) + reg##_RSZ * (ri))
-#define ocelot_rmw_gix(ocelot, val, m, reg, gi) __ocelot_rmw_ix(ocelot, val, m, reg, reg##_GSZ * (gi))
-#define ocelot_rmw_rix(ocelot, val, m, reg, ri) __ocelot_rmw_ix(ocelot, val, m, reg, reg##_RSZ * (ri))
+#define ocelot_rmw_ix(ocelot, val, m, reg, gi, ri) \
+	__ocelot_rmw_ix(ocelot, val, m, reg, reg##_GSZ * (gi) + reg##_RSZ * (ri))
+#define ocelot_rmw_gix(ocelot, val, m, reg, gi) \
+	__ocelot_rmw_ix(ocelot, val, m, reg, reg##_GSZ * (gi))
+#define ocelot_rmw_rix(ocelot, val, m, reg, ri) \
+	__ocelot_rmw_ix(ocelot, val, m, reg, reg##_RSZ * (ri))
 #define ocelot_rmw(ocelot, val, m, reg) __ocelot_rmw_ix(ocelot, val, m, reg, 0)
 
-#define ocelot_field_write(ocelot, reg, val) regmap_field_write((ocelot)->regfields[(reg)], (val))
-#define ocelot_field_read(ocelot, reg, val) regmap_field_read((ocelot)->regfields[(reg)], (val))
-#define ocelot_fields_write(ocelot, id, reg, val) regmap_fields_write((ocelot)->regfields[(reg)], (id), (val))
-#define ocelot_fields_read(ocelot, id, reg, val) regmap_fields_read((ocelot)->regfields[(reg)], (id), (val))
+#define ocelot_field_write(ocelot, reg, val) \
+	regmap_field_write((ocelot)->regfields[(reg)], (val))
+#define ocelot_field_read(ocelot, reg, val) \
+	regmap_field_read((ocelot)->regfields[(reg)], (val))
+#define ocelot_fields_write(ocelot, id, reg, val) \
+	regmap_fields_write((ocelot)->regfields[(reg)], (id), (val))
+#define ocelot_fields_read(ocelot, id, reg, val) \
+	regmap_fields_read((ocelot)->regfields[(reg)], (id), (val))
 
 #define ocelot_target_read_ix(ocelot, target, reg, gi, ri) \
 	__ocelot_target_read_ix(ocelot, target, reg, reg##_GSZ * (gi) + reg##_RSZ * (ri))
-- 
2.25.1