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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id j66si664939pgc.858.2022.02.14.12.49.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Feb 2022 12:49:56 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=yrvwxFIS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 7CDE01CCF61; Mon, 14 Feb 2022 12:15:24 -0800 (PST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234403AbiBMIdv (ORCPT + 99 others); Sun, 13 Feb 2022 03:33:51 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:49890 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229555AbiBMIdu (ORCPT ); Sun, 13 Feb 2022 03:33:50 -0500 Received: from alexa-out-sd-02.qualcomm.com (alexa-out-sd-02.qualcomm.com [199.106.114.39]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5137A5E77A; Sun, 13 Feb 2022 00:33:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1644741225; x=1676277225; h=from:to:cc:subject:date:message-id:mime-version; bh=JURP9AmcoLc1fhFWvK5ML0fsoJH7goTwLeATaM2KKRI=; b=yrvwxFISmglv7i+bAGfVWvVNt2q58xsdIlx/iwv7LR5t2jhjC3X2uHCp gSZ6YYeYKWIytkmG7GN4w3N0bDu4IJ6Mun2IxBK5JFbXSLD3PHMUjtm7g kZBivaKSXHEytU1QfCPyFXjhVr0dFxlJdP0kgh1OJkv7gSBhhgFJ/eOs0 E=; Received: from unknown (HELO ironmsg02-sd.qualcomm.com) ([10.53.140.142]) by alexa-out-sd-02.qualcomm.com with ESMTP; 13 Feb 2022 00:33:44 -0800 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg02-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Feb 2022 00:33:43 -0800 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.15; Sun, 13 Feb 2022 00:33:43 -0800 Received: from jprakash-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Sun, 13 Feb 2022 00:33:36 -0800 From: Jishnu Prakash To: , , , , , , , , , , , , , , , , , CC: , , , , , Jishnu Prakash Subject: [PATCH V5 0/4] thermal: qcom: Add support for PMIC5 Gen2 ADC_TM Date: Sun, 13 Feb 2022 14:03:07 +0530 Message-ID: <1644741191-12039-1-git-send-email-quic_jprakash@quicinc.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Changes in v5: Fixed some compilation errors in patch 4. Changes in v4: Addressed comments given by Jonathan (for using put_unaligned_le16) and by Dmitry (for using separate init function and correcting args_count) for qcom-spmi-adc-tm5.c in patch 4. Added init function in patch 3. Changes in v3: Addressed comments given by Jonathan for qcom-spmi-adc-tm5.yaml. Addressed comments given by Dmitry and Jonathan for qcom-spmi-adc-tm5.c. Split patch for qcom-spmi-adc-tm5.c into two parts, one to refactor code to support multiple device generations and the second to add actual Gen2 ADC_TM changes. Changes in v2: Split IIO file changes into separate patch. Addressed comments given by Dmitry for qcom-spmi-adc-tm5.c. Changes in v1: PMIC5 Gen2 ADC_TM is supported on PMIC7 chips and is a close counterpart of PMIC7 ADC. It has the same functionality as PMIC5 ADC_TM, to support generating interrupts on ADC value crossing upper or lower thresholds for monitored channels. Jishnu Prakash (4): dt-bindings: thermal: qcom: add PMIC5 Gen2 ADC_TM bindings iio: adc: qcom-vadc-common: add reverse scaling for PMIC5 Gen2 ADC_TM thermal: qcom: Add support for multiple generations of devices thermal: qcom: add support for PMIC5 Gen2 ADCTM .../bindings/thermal/qcom-spmi-adc-tm5.yaml | 110 ++++- drivers/iio/adc/qcom-vadc-common.c | 11 + drivers/thermal/qcom/qcom-spmi-adc-tm5.c | 486 +++++++++++++++++++-- include/linux/iio/adc/qcom-vadc-common.h | 2 + 4 files changed, 569 insertions(+), 40 deletions(-) -- 2.7.4