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Mon, 14 Feb 2022 18:00:22 -0600 From: Mario Limonciello To: Borislav Petkov , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" CC: Kees Cook , Thomas Lendacky , , Martin Fernandez , , "Brijesh Singh" , Mario Limonciello Subject: [PATCH v3] x86/cpu: clear SME features when not in use Date: Mon, 14 Feb 2022 17:58:01 -0600 Message-ID: <20220214235801.238260-1-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 2fe44da9-8ff8-4b11-ed16-08d9f01629ea X-MS-TrafficTypeDiagnostic: DM6PR12MB4233:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6790; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: nQV1tQelg7DiEUlIOkUaGqiMrCoYApEtOOZT9t1ZHxQOHulq36WQPLUwLUl8iOByzukW8c/nQQflrjqfiNv9hQoEb3w15mZeOS8/KjBCVTkAqxE7nRAAO3yqqz2gvnNErcfqpkNs3avjTkg5XvyL+/G0p8M5lrh4qIQ+9TVIdHEbhV2BggBc6gd31JE7x15ZwqKC3VbsUgGSdi9PoWgIBvesdvKomLeVgy5P/PDL44DFJr5LdS04VosYBJGC8Ga92ey/+uxyeCEuGx+h6FV2jkzvq2HStrXDtS+R+7tNTWg9HyS/sviAXwdZSIL6uLE4fm6jLAdp1FdOCQfcqzroydjjhqdj6DcnmljIiDGQf5FMCQ3paLRXRiSsqn+yaFrIQgWNgqtb5BBjth/yXE7NXjh06lQWOy4tcHNni+Oxe879/Yih2pa3xD/bXpZ3L3xAdbmNuq8pslmkHxxEYjfxPXdliLpL2MCNwzEHhyDB36+SFbiGxsxOr2qo7l/zQvbMd1AYYXA4cSs4LDF7aEQ8VNWPoAWaEBW1rdbKwfqTm5ipDRISRxrkPKWn6kl2gg47jB931gMb8p5MD8H/jVnzbWlap2APoBXdVNXxTkSTcpiH42JXqA7Z99qzMqMo7JDgN4yN6negDMaq+XG8CepSe1wSzC8RDTmgnK4CRMo4fRFV2h8q7d3iBUPOObT9/vEW0oB8kgBP6OD4+2ayTZ4gFw== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230001)(4636009)(46966006)(36840700001)(40470700004)(336012)(8676002)(70586007)(70206006)(4326008)(426003)(6666004)(86362001)(508600001)(2616005)(83380400001)(16526019)(1076003)(26005)(82310400004)(110136005)(54906003)(316002)(186003)(36756003)(356005)(2906002)(81166007)(40460700003)(47076005)(5660300002)(8936002)(44832011)(36860700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Feb 2022 00:00:23.2063 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2fe44da9-8ff8-4b11-ed16-08d9f01629ea X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT038.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4233 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently the SME CPU feature flag is reflective of whether the CPU supports the features but not whether they have been activated by the kernel. Change this around to clear the features if the kernel is not using them so userspace can determine if they are available and in use from `/proc/cpuinfo`. As the feature flag is now cleared on systems that SME isn't active use CPUID 0x8000001f to confirm SME availability before calling `native_wbinvd`. Signed-off-by: Mario Limonciello --- Changes from v2->v3: * Drop all changes related to SEV, these will be worked out separately. * Only clear SME flag rather than all flags if sme_me_mask is not set arch/x86/kernel/cpu/amd.c | 3 +++ arch/x86/kernel/process.c | 5 ++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 4edb6f0f628c..8421b9d9f552 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -607,6 +607,9 @@ static void early_detect_mem_encrypt(struct cpuinfo_x86 *c) if (IS_ENABLED(CONFIG_X86_32)) goto clear_all; + if (!sme_me_mask) + setup_clear_cpu_cap(X86_FEATURE_SME); + rdmsrl(MSR_K7_HWCR, msr); if (!(msr & MSR_K7_HWCR_SMMLOCK)) goto clear_sev; diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index 81d8ef036637..e131d71b3cae 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c @@ -765,8 +765,11 @@ void stop_this_cpu(void *dummy) * without the encryption bit, they don't race each other when flushed * and potentially end up with the wrong entry being committed to * memory. + * + * Test the CPUID bit directly because the machine might've cleared + * X86_FEATURE_SME due to cmdline options. */ - if (boot_cpu_has(X86_FEATURE_SME)) + if (cpuid_eax(0x8000001f) & BIT(0)) native_wbinvd(); for (;;) { /* -- 2.34.1