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Date:   Tue, 15 Feb 2022 10:31:35 -0600
From:   Bjorn Andersson <bjorn.andersson@linaro.org>
To:     Luca Weiss <luca@z3ntu.xyz>
Cc:     linux-arm-msm@vger.kernel.org,
        ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org,
        Vladimir Lypak <vladimir.lypak@gmail.com>,
        Andy Gross <agross@kernel.org>,
        Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH 12/15] arm64: dts: qcom: Add SDM632 device tree
Message-ID: <YgvVZ5iZn0UbyF3u@yoga>
References: <20220112194118.178026-1-luca@z3ntu.xyz>
 <20220112194118.178026-13-luca@z3ntu.xyz>
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On Wed 12 Jan 13:41 CST 2022, Luca Weiss wrote:

> From: Vladimir Lypak <vladimir.lypak@gmail.com>
> 
> Snapdragon 632 is based on msm8953, add the devicee tree for that.
> 

The commit message is a little bit thin on details about the change.

> Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
> Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
> ---
>  arch/arm64/boot/dts/qcom/sdm632.dtsi | 125 +++++++++++++++++++++++++++
>  1 file changed, 125 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/sdm632.dtsi
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm632.dtsi b/arch/arm64/boot/dts/qcom/sdm632.dtsi
> new file mode 100644
> index 000000000000..b80ba8a5ef3f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sdm632.dtsi
> @@ -0,0 +1,125 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/* Copyright (c) 2022, The Linux Foundation. All rights reserved. */
> +
> +#include "msm8953.dtsi"
> +
> +/ {
> +	thermal-zones {
> +		/delete-node/cpu0-thermal;

Below you replace cpu[4-7]-thermal. What about cpu[0-3]-thermal? And I
would prefer the answer to be documented in the commit message.

Regards,
Bjorn

> +		/delete-node/cpu1-thermal;
> +		/delete-node/cpu2-thermal;
> +		/delete-node/cpu3-thermal;
> +		/delete-node/cpu4-thermal;
> +		/delete-node/cpu5-thermal;
> +		/delete-node/cpu6-thermal;
> +		/delete-node/cpu7-thermal;
> +		cpu4-thermal {
> +			polling-delay-passive = <250>;
> +			polling-delay = <1000>;
> +			thermal-sensors = <&tsens0 5>;
> +			trips {
> +				cpu4_alert: trip-point0 {
> +					temperature = <80000>;
> +					hysteresis = <2000>;
> +					type = "passive";
> +				};
> +				cpu4_crit: crit {
> +					temperature = <100000>;
> +					hysteresis = <2000>;
> +					type = "critical";
> +				};
> +			};
> +			cooling-maps {
> +				map0 {
> +					trip = <&cpu4_alert>;
> +					cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +				};
> +			};
> +		};
> +		cpu5-thermal {
> +			polling-delay-passive = <250>;
> +			polling-delay = <1000>;
> +			thermal-sensors = <&tsens0 6>;
> +			trips {
> +				cpu5_alert: trip-point0 {
> +					temperature = <80000>;
> +					hysteresis = <2000>;
> +					type = "passive";
> +				};
> +				cpu5_crit: crit {
> +					temperature = <100000>;
> +					hysteresis = <2000>;
> +					type = "critical";
> +				};
> +			};
> +			cooling-maps {
> +				map0 {
> +					trip = <&cpu5_alert>;
> +					cooling-device = <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +				};
> +			};
> +		};
> +		cpu6-thermal {
> +			polling-delay-passive = <250>;
> +			polling-delay = <1000>;
> +			thermal-sensors = <&tsens0 7>;
> +			trips {
> +				cpu6_alert: trip-point0 {
> +					temperature = <80000>;
> +					hysteresis = <2000>;
> +					type = "passive";
> +				};
> +				cpu6_crit: crit {
> +					temperature = <100000>;
> +					hysteresis = <2000>;
> +					type = "critical";
> +				};
> +			};
> +			cooling-maps {
> +				map0 {
> +					trip = <&cpu6_alert>;
> +					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +				};
> +			};
> +		};
> +		cpu7-thermal {
> +			polling-delay-passive = <250>;
> +			polling-delay = <1000>;
> +			thermal-sensors = <&tsens0 8>;
> +			trips {
> +				cpu7_alert: trip-point0 {
> +					temperature = <80000>;
> +					hysteresis = <2000>;
> +					type = "passive";
> +				};
> +				cpu7_crit: crit {
> +					temperature = <100000>;
> +					hysteresis = <2000>;
> +					type = "critical";
> +				};
> +			};
> +			cooling-maps {
> +				map0 {
> +					trip = <&cpu7_alert>;
> +					cooling-device = <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +				};
> +			};
> +		};
> +	};
> +};
> +
> +&CPU4 {
> +	capacity-dmips-mhz = <1980>;
> +};
> +
> +&CPU5 {
> +	capacity-dmips-mhz = <1980>;
> +};
> +
> +&CPU6 {
> +	capacity-dmips-mhz = <1980>;
> +};
> +
> +&CPU7 {
> +	capacity-dmips-mhz = <1980>;
> +};
> -- 
> 2.34.1
>