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Date:   Tue, 15 Feb 2022 18:28:19 +0000
From:   Will Deacon <will@kernel.org>
To:     cgel.zte@gmail.com
Cc:     catalin.marinas@arm.com, pasha.tatashin@soleen.com,
        si.hao@zte.com.cn, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, james.morse@arm.com
Subject: Re: [PATCH linux-next] arm64: kexec: Support the case of VA_BITS=39
 in trans_pgd_idmap_page()
Message-ID: <20220215182818.GA9026@willie-the-truck>
References: <20220121065216.1001021-1-si.hao@zte.com.cn>
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On Fri, Jan 21, 2022 at 06:52:16AM +0000, cgel.zte@gmail.com wrote:
> From: sihao <si.hao@zte.com.cn>
> 
> When the values of CONFIG_ARM64_VA_BITS and CONFIG_ARM64_PA_BITS are not
> equal, the following panic occurs when kexec is executed.
> 
> This happens because trans_pgd_idmap_page() does not support VA_BITS=39.
> So the patch supports the case of VA_BITS=39.

--->8

> diff --git a/arch/arm64/mm/trans_pgd.c b/arch/arm64/mm/trans_pgd.c
> index d7da8ca40d2e..3d88185adcf5 100644
> --- a/arch/arm64/mm/trans_pgd.c
> +++ b/arch/arm64/mm/trans_pgd.c
> @@ -232,7 +232,7 @@ int trans_pgd_idmap_page(struct trans_pgd_info *info, phys_addr_t *trans_ttbr0,
>  {
>  	phys_addr_t dst_addr = virt_to_phys(page);
>  	unsigned long pfn = __phys_to_pfn(dst_addr);
> -	int max_msb = (dst_addr & GENMASK(52, 48)) ? 51 : 47;
> +	int max_msb = (dst_addr & GENMASK(52, VA_BITS)) ? 51 : (VA_BITS - 1);
>  	int bits_mapped = PAGE_SHIFT - 4;
>  	unsigned long level_mask, prev_level_entry, *levels[4];
>  	int this_level, index, level_lsb, level_msb;

Do you plan to respin this based on Catalin's comments?

Will