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Tue, 15 Feb 2022 21:01:01 -0800 Received: by xsj-xw9400.xilinx.com (Postfix, from userid 21952) id 01EDA6010E2; Tue, 15 Feb 2022 21:01:00 -0800 (PST) From: Lizhi Hou To: , CC: Lizhi Hou , , , , , , , , , , Subject: [PATCH V2 Create empty OF root 0/1] XRT Alveo driver infrastructure overview Date: Tue, 15 Feb 2022 21:00:55 -0800 Message-ID: <20220216050056.311496-1-lizhi.hou@xilinx.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: b82913d1-bc1d-4047-e8b8-08d9f1095483 X-MS-TrafficTypeDiagnostic: DM6PR02MB6666:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8273; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: oNsCqoURdnV5BP0POsZRTFMGESRnqzoGrY0gkdG/FVyX2LpOaGNcHRCA5+qzsyfYA4CxCD5kwl5eDokutU0U+5Oxgcgbv9fBYz9fjESzpO4KvWrPV6u0ZB9RbXtjeVy+m/Wwb929UgYxhYrOQnOWaOOsOV2uPfUrhprQrqi2Lm+A1mxWG+GIXBIdM7Vva4NFp2x+aR4P8lBQZ4usEMfoVYHyrZz6N4msYNDLHCRO93khqVzHSop1q4uwEVuBc1NcwBg6XOAcd4/mhDmfdoGib/W6Qc/0xqLLzi/+Yyi/mRG9pFEzKD0WrZYUSMfo1geXmy2eg8njPboHVNL81A3aYUHeGNZ2PBJ/LPC+9rB8F+xBUcT5sW6BdIgJc8I2J3A2DKQPrI7ea99OZdjcC4XtitWAZDRI2f5KISbk55aDYVeybqmtVhJqzDF59bmTrUwU61ngdOkMNrZ/csigChbOs0m0zOIkhuT2KHWSjy50lLCMuQwnXtaq6pbJT8akBhpMwmxlLVt9GyHKcyMkwjDqxUmdqjSOJ8IYLgILtqRzKD5DmYRws3pOJDLuc6gU6y2XRBnhX1apvoE4AVZWJTQSa8YRvUm6wk657q8L3Xi3jrHMKlgoUCEoC0+y4mCAlyVsmwi61Q5SiFbvljVhpP0bTjmFNDfjQw0oI4juvAuQD2cwJyG+vh6ci25manEeTa3vhg5bSnHTjgjoF3h4AmcnZ9gBLNgmgltQK+81UKlJi3Q7A6TjVZmelAhrN4Gec8RruOWiXTszCaSn6nY3ziA+AlipV381aHPebxuX/f4/cwBf41cV8go57u8Oo9RjFGOG X-Forefront-Antispam-Report: CIP:149.199.62.198;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:xsj-pvapexch02.xlnx.xilinx.com;PTR:unknown-62-198.xilinx.com;CAT:NONE;SFS:(13230001)(4636009)(46966006)(40470700004)(36840700001)(356005)(6666004)(7636003)(4326008)(82310400004)(2616005)(1076003)(8676002)(336012)(40460700003)(26005)(186003)(426003)(70586007)(44832011)(70206006)(8936002)(5660300002)(6266002)(47076005)(36860700001)(966005)(508600001)(36756003)(316002)(2906002)(110136005)(54906003)(42186006);DIR:OUT;SFP:1101; X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Feb 2022 05:01:02.3160 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b82913d1-bc1d-4047-e8b8-08d9f1095483 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch02.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: BN1NAM02FT019.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR02MB6666 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RDNS_NONE, SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, This patch is to create an empty device tree if there is not one. For the use case that hardware like Xilinx Alveo PCIe accelerator uses flattened device tree to describe apertures in its PCIe BARs, a base tree with nodes for the device needs to be created if there is not one. Then the flattened device tree overlay from the device can be applied to the base tree. Please refer the previous discussions with device tree maintainer: https://lore.kernel.org/lkml/CAL_JsqJfyRymB=VxLuQqLpep+Q1Eie48dobv9sC5OizDz0d2DQ@mail.gmail.com/ This patch is the first step creates empty OF root node if the arch does not have device tree created. I will post a follow on patch series to add PCIe interface for the creation of device tree node for a PCIe device. This will enable a PCIe device driver to apply an overlay under a PCIe device tree node. Please refer previous discussions with FPGA maintainer: https://lore.kernel.org/lkml/20220105225013.1567871-1-lizhi.hou@xilinx.com/ We would like to use this infrastructure to describe and bind platform drivers for HW IPs in Alveo PCIe accelerator device. Lizhi Hou (1): of: create empty of root drivers/of/Kconfig | 5 ++++ drivers/of/Makefile | 1 + drivers/of/of_empty_root.c | 51 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 57 insertions(+) create mode 100644 drivers/of/of_empty_root.c -- 2.27.0