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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id z134si5444059pgz.325.2022.02.15.23.22.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Feb 2022 23:22:14 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; dkim=pass header.i=@atishpatra.org header.s=google header.b=m5LQ24g7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 26EF927DF3B; Tue, 15 Feb 2022 22:52:15 -0800 (PST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245141AbiBPAu5 (ORCPT + 99 others); Tue, 15 Feb 2022 19:50:57 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:52282 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245134AbiBPAu5 (ORCPT ); Tue, 15 Feb 2022 19:50:57 -0500 Received: from mail-yb1-xb29.google.com (mail-yb1-xb29.google.com [IPv6:2607:f8b0:4864:20::b29]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4B0CBF9540 for ; Tue, 15 Feb 2022 16:50:45 -0800 (PST) Received: by mail-yb1-xb29.google.com with SMTP id y129so1254168ybe.7 for ; Tue, 15 Feb 2022 16:50:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=atishpatra.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=18yu/FZC6YEfqqlag7jyriW5vrB8+cTbyqFvDzZCLG8=; b=m5LQ24g7yrUGMPrnK27dqe7h8K7PMML+kc3AYdjuLbCttuSnZSjrFawQgnI8h8+h1l QHs3tnwESiGMBTpQjgxnWPdVydoP9FV7bIXyTkN6uNw1Pzl53BKxnOwqjHf0jDfFwkyK kLObIYhW7r6uO/+vuUqzoiBQF6D0T2vJp00PU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=18yu/FZC6YEfqqlag7jyriW5vrB8+cTbyqFvDzZCLG8=; b=tCn2eOovMqEZtJN1fdGvrHAwIrr+kX/oTO3YYNRcgMoChwv2qFfjHtE58nAkfVZ+7Y aG424lZbWQcmN6qIZdqStezg+n3n8I35My4RQmTnx7d9d9+Z4jveLz1vHCgd1f9HnPQU GLhm169X/fkAbgFoSjz+F6HHfKng/L3SJ43GjJKXztEioF2YaWPxaMIP3xdUV4qs1mqS FfK2y3wXTwGkJedxeXyS2NDWZBSPyuNVic0Wc7bfw3YmA5FDmkMH8osbTOuVMHBqw5X4 7y3OV2ToAA8smwNdTmmnEAjZ8YR7NnD21hyMPD/e8bCioa7rNLBv3P8ID3j1T5bRxJkA nmug== X-Gm-Message-State: AOAM532n6mfQ1hzSNfjOPUzVg+2QcTdtv3TxSftQOq+eBSiKTG5RMjJ2 C8+q7qpgFogds+zzp4QjE5sU0TOypBi/0LqvgCV6 X-Received: by 2002:a25:9388:0:b0:61d:6ff8:6472 with SMTP id a8-20020a259388000000b0061d6ff86472mr194270ybm.121.1644972644540; Tue, 15 Feb 2022 16:50:44 -0800 (PST) MIME-Version: 1.0 References: <20220210054947.170134-1-apatel@ventanamicro.com> <20220210054947.170134-2-apatel@ventanamicro.com> In-Reply-To: <20220210054947.170134-2-apatel@ventanamicro.com> From: Atish Patra Date: Tue, 15 Feb 2022 16:50:33 -0800 Message-ID: Subject: Re: [PATCH v11 1/8] RISC-V: Enable CPU_IDLE drivers To: Anup Patel Cc: Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Ulf Hansson , "Rafael J . Wysocki" , Pavel Machek , Rob Herring , Sandeep Tripathy , Alistair Francis , Liush , Anup Patel , devicetree , linux-riscv , "linux-kernel@vger.kernel.org List" , "open list:THERMAL" , "linux-arm-kernel@lists.infradead.org" , kvm-riscv@lists.infradead.org, Guo Ren Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Feb 9, 2022 at 9:50 PM Anup Patel wrote: > > From: Anup Patel > > We force select CPU_PM and provide asm/cpuidle.h so that we can > use CPU IDLE drivers for Linux RISC-V kernel. > > Signed-off-by: Anup Patel > Signed-off-by: Anup Patel > Reviewed-by: Guo Ren > --- > arch/riscv/Kconfig | 7 +++++++ > arch/riscv/configs/defconfig | 1 + > arch/riscv/configs/rv32_defconfig | 1 + > arch/riscv/include/asm/cpuidle.h | 24 ++++++++++++++++++++++++ > arch/riscv/kernel/process.c | 3 ++- > 5 files changed, 35 insertions(+), 1 deletion(-) > create mode 100644 arch/riscv/include/asm/cpuidle.h > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index 5adcbd9b5e88..76976d12b463 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -46,6 +46,7 @@ config RISCV > select CLONE_BACKWARDS > select CLINT_TIMER if !MMU > select COMMON_CLK > + select CPU_PM if CPU_IDLE > select EDAC_SUPPORT > select GENERIC_ARCH_TOPOLOGY if SMP > select GENERIC_ATOMIC64 if !64BIT > @@ -547,4 +548,10 @@ source "kernel/power/Kconfig" > > endmenu > > +menu "CPU Power Management" > + > +source "drivers/cpuidle/Kconfig" > + > +endmenu > + > source "arch/riscv/kvm/Kconfig" > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig > index f120fcc43d0a..a5e0482a4969 100644 > --- a/arch/riscv/configs/defconfig > +++ b/arch/riscv/configs/defconfig > @@ -20,6 +20,7 @@ CONFIG_SOC_SIFIVE=y > CONFIG_SOC_VIRT=y > CONFIG_SMP=y > CONFIG_HOTPLUG_CPU=y > +CONFIG_CPU_IDLE=y > CONFIG_VIRTUALIZATION=y > CONFIG_KVM=m > CONFIG_JUMP_LABEL=y > diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig > index 8b56a7f1eb06..d1b87db54d68 100644 > --- a/arch/riscv/configs/rv32_defconfig > +++ b/arch/riscv/configs/rv32_defconfig > @@ -20,6 +20,7 @@ CONFIG_SOC_VIRT=y > CONFIG_ARCH_RV32I=y > CONFIG_SMP=y > CONFIG_HOTPLUG_CPU=y > +CONFIG_CPU_IDLE=y > CONFIG_VIRTUALIZATION=y > CONFIG_KVM=m > CONFIG_JUMP_LABEL=y > diff --git a/arch/riscv/include/asm/cpuidle.h b/arch/riscv/include/asm/cpuidle.h > new file mode 100644 > index 000000000000..71fdc607d4bc > --- /dev/null > +++ b/arch/riscv/include/asm/cpuidle.h > @@ -0,0 +1,24 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (C) 2021 Allwinner Ltd > + * Copyright (C) 2021 Western Digital Corporation or its affiliates. > + */ > + > +#ifndef _ASM_RISCV_CPUIDLE_H > +#define _ASM_RISCV_CPUIDLE_H > + > +#include > +#include > + > +static inline void cpu_do_idle(void) > +{ > + /* > + * Add mb() here to ensure that all > + * IO/MEM accesses are completed prior > + * to entering WFI. > + */ > + mb(); > + wait_for_interrupt(); > +} > + > +#endif > diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c > index 03ac3aa611f5..504b496787aa 100644 > --- a/arch/riscv/kernel/process.c > +++ b/arch/riscv/kernel/process.c > @@ -23,6 +23,7 @@ > #include > #include > #include > +#include > > register unsigned long gp_in_global __asm__("gp"); > > @@ -37,7 +38,7 @@ extern asmlinkage void ret_from_kernel_thread(void); > > void arch_cpu_idle(void) > { > - wait_for_interrupt(); > + cpu_do_idle(); > raw_local_irq_enable(); > } > > -- > 2.25.1 > Reviewed-by: Atish Patra -- Regards, Atish