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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: quicinc.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SJ0PR02MB8449.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: b4fd9888-cf12-45ee-1c8a-08d9f11eb9b7 X-MS-Exchange-CrossTenant-originalarrivaltime: 16 Feb 2022 07:34:11.5483 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 98e9ba89-e1a1-4e38-9007-8bdabc25de1d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: GK54/rbEiWhnTcTansqdrDDrqJgbf1ZoOi/enbIkN2C3/5tnNRjrNI/aa3PTtbbATKidR3hUYy1zFQ0YfaIUekdO+IYgifmXWBfu1RVJG7Q= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR02MB2799 X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Bjorn, Thank you. Sure will address this in patch set. Thanks, Sajida -----Original Message----- From: Bjorn Andersson =20 Sent: Tuesday, February 15, 2022 10:29 PM To: Sajida Bhanu (Temp) (QUIC) Cc: adrian.hunter@intel.com; Asutosh Das (QUIC) = ; ulf.hansson@linaro.org; agross@kernel.org; linux-mmc@vger.kernel.org; lin= ux-arm-msm@vger.kernel.org; linux-kernel@vger.kernel.org; stummala@codeauro= ra.org; vbadigan@codeaurora.org; Ram Prakash Gupta (QUIC) ; Pradeep Pragallapati (QUIC) ; sartga= rg@codeaurora.org; nitirawa@codeaurora.org; sayalil@codeaurora.org; Liangli= ang Lu ; Bao D . Nguyen Subject: Re: [PATCH V3 1/4] mmc: sdhci: Capture eMMC and SD card errors On Thu 20 Jan 11:26 CST 2022, Shaik Sajida Bhanu wrote: > Add changes to capture eMMC and SD card errors. > This is useful for debug and testing. >=20 > Signed-off-by: Shaik Sajida Bhanu > Signed-off-by: Liangliang Lu > Signed-off-by: Sayali Lokhande > Signed-off-by: Bao D. Nguyen Please read https://docs.kernel.org/process/submitting-patches.html#sign-your-work-the-= developer-s-certificate-of-origin and the one section below on what your S-o-b actually means. In particular this does not say "the four of us authored this patch", it do= cuments the path the patch took to this point. In which case Bao is the las= t one stating that he _handled_ the patch - but then somehow it came out of= your mailbox. You're probably looking for Co-developed-by, which is described just below = that. Regards, Bjorn > --- > drivers/mmc/host/sdhci-msm.c | 3 ++ > drivers/mmc/host/sdhci.c | 72 ++++++++++++++++++++++++++++++++++++--= ------ > include/linux/mmc/host.h | 31 +++++++++++++++++++ > 3 files changed, 94 insertions(+), 12 deletions(-) >=20 > diff --git a/drivers/mmc/host/sdhci-msm.c=20 > b/drivers/mmc/host/sdhci-msm.c index 50c71e0..309eb7b 100644 > --- a/drivers/mmc/host/sdhci-msm.c > +++ b/drivers/mmc/host/sdhci-msm.c > @@ -128,6 +128,8 @@ > =20 > #define MSM_MMC_AUTOSUSPEND_DELAY_MS 50 > =20 > +#define MSM_MMC_ERR_STATS_ENABLE 1 > + > /* Timeout value to avoid infinite waiting for pwr_irq */ #define=20 > MSM_PWR_IRQ_TIMEOUT_MS 5000 > =20 > @@ -2734,6 +2736,7 @@ static int sdhci_msm_probe(struct platform_device *= pdev) > if (ret) > goto pm_runtime_disable; > =20 > + host->mmc->err_stats_enabled =3D MSM_MMC_ERR_STATS_ENABLE; > pm_runtime_mark_last_busy(&pdev->dev); > pm_runtime_put_autosuspend(&pdev->dev); > =20 > diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index=20 > 07c6da1..74b356e 100644 > --- a/drivers/mmc/host/sdhci.c > +++ b/drivers/mmc/host/sdhci.c > @@ -113,6 +113,8 @@ void sdhci_dumpregs(struct sdhci_host *host) > if (host->ops->dump_vendor_regs) > host->ops->dump_vendor_regs(host); > =20 > + if (host->mmc->err_stats_enabled) > + mmc_debugfs_err_stats_enable(host->mmc); > SDHCI_DUMP("=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= \n"); > } > EXPORT_SYMBOL_GPL(sdhci_dumpregs); > @@ -3159,6 +3161,8 @@ static void sdhci_timeout_timer(struct timer_list *= t) > spin_lock_irqsave(&host->lock, flags); > =20 > if (host->cmd && !sdhci_data_line_cmd(host->cmd)) { > + if (host->mmc && host->mmc->err_stats_enabled) > + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_REQ_TIMEOUT); > pr_err("%s: Timeout waiting for hardware cmd interrupt.\n", > mmc_hostname(host->mmc)); > sdhci_dumpregs(host); > @@ -3181,6 +3185,8 @@ static void sdhci_timeout_data_timer(struct=20 > timer_list *t) > =20 > if (host->data || host->data_cmd || > (host->cmd && sdhci_data_line_cmd(host->cmd))) { > + if (host->mmc && host->mmc->err_stats_enabled) > + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_REQ_TIMEOUT); > pr_err("%s: Timeout waiting for hardware interrupt.\n", > mmc_hostname(host->mmc)); > sdhci_dumpregs(host); > @@ -3240,11 +3246,18 @@ static void sdhci_cmd_irq(struct sdhci_host=20 > *host, u32 intmask, u32 *intmask_p) > =20 > if (intmask & (SDHCI_INT_TIMEOUT | SDHCI_INT_CRC | > SDHCI_INT_END_BIT | SDHCI_INT_INDEX)) { > - if (intmask & SDHCI_INT_TIMEOUT) > + if (intmask & SDHCI_INT_TIMEOUT) { > host->cmd->error =3D -ETIMEDOUT; > - else > + if (host->mmc && host->mmc->err_stats_enabled) > + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_CMD_TIMEOUT); > + } else { > host->cmd->error =3D -EILSEQ; > - > + if (host->cmd->opcode !=3D MMC_SEND_TUNING_BLOCK || > + host->cmd->opcode !=3D MMC_SEND_TUNING_BLOCK_HS200) { > + if (host->mmc && host->mmc->err_stats_enabled) > + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_CMD_CRC); > + } > + } > /* Treat data command CRC error the same as data CRC error */ > if (host->cmd->data && > (intmask & (SDHCI_INT_CRC | SDHCI_INT_TIMEOUT)) =3D=3D @@ -3265,6= =20 > +3278,8 @@ static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask= , u32 *intmask_p) > int err =3D (auto_cmd_status & SDHCI_AUTO_CMD_TIMEOUT) ? > -ETIMEDOUT : > -EILSEQ; > + if (host->mmc && host->mmc->err_stats_enabled) > + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_AUTO_CMD); > =20 > if (sdhci_auto_cmd23(host, mrq)) { > mrq->sbc->error =3D err; > @@ -3342,6 +3357,8 @@ static void sdhci_data_irq(struct sdhci_host *host,= u32 intmask) > if (intmask & SDHCI_INT_DATA_TIMEOUT) { > host->data_cmd =3D NULL; > data_cmd->error =3D -ETIMEDOUT; > + if (host->mmc && host->mmc->err_stats_enabled) > + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_CMD_TIMEOUT); > __sdhci_finish_mrq(host, data_cmd->mrq); > return; > } > @@ -3375,18 +3392,29 @@ static void sdhci_data_irq(struct sdhci_host *hos= t, u32 intmask) > return; > } > =20 > - if (intmask & SDHCI_INT_DATA_TIMEOUT) > + if (intmask & SDHCI_INT_DATA_TIMEOUT) { > host->data->error =3D -ETIMEDOUT; > + if (host->mmc && host->mmc->err_stats_enabled) > + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_DAT_TIMEOUT); > + } > else if (intmask & SDHCI_INT_DATA_END_BIT) > host->data->error =3D -EILSEQ; > else if ((intmask & SDHCI_INT_DATA_CRC) && > SDHCI_GET_CMD(sdhci_readw(host, SDHCI_COMMAND)) > - !=3D MMC_BUS_TEST_R) > + !=3D MMC_BUS_TEST_R) { > host->data->error =3D -EILSEQ; > + if (host->cmd->opcode !=3D MMC_SEND_TUNING_BLOCK || > + host->cmd->opcode !=3D MMC_SEND_TUNING_BLOCK_HS200) { > + if (host->mmc && host->mmc->err_stats_enabled) > + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_DAT_CRC); > + } > + } > else if (intmask & SDHCI_INT_ADMA_ERROR) { > pr_err("%s: ADMA error: 0x%08x\n", mmc_hostname(host->mmc), > intmask); > sdhci_adma_show_error(host); > + if (host->mmc && host->mmc->err_stats_enabled) > + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_ADMA); > host->data->error =3D -EIO; > if (host->ops->adma_workaround) > host->ops->adma_workaround(host, intmask); @@ -3905,20 +3933,40 @@=20 > bool sdhci_cqe_irq(struct sdhci_host *host, u32 intmask, int *cmd_error, > if (!host->cqe_on) > return false; > =20 > - if (intmask & (SDHCI_INT_INDEX | SDHCI_INT_END_BIT | SDHCI_INT_CRC)) > + if (intmask & (SDHCI_INT_INDEX | SDHCI_INT_END_BIT | SDHCI_INT_CRC))=20 > +{ > *cmd_error =3D -EILSEQ; > - else if (intmask & SDHCI_INT_TIMEOUT) > + if (intmask & SDHCI_INT_CRC) { > + if (host->cmd->opcode !=3D MMC_SEND_TUNING_BLOCK || > + host->cmd->opcode !=3D MMC_SEND_TUNING_BLOCK_HS200) { > + if (host->mmc && host->mmc->err_stats_enabled) > + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_CMD_CRC); > + } > + } > + } else if (intmask & SDHCI_INT_TIMEOUT) { > *cmd_error =3D -ETIMEDOUT; > - else > + if (host->mmc && host->mmc->err_stats_enabled) > + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_CMD_TIMEOUT); > + } else > *cmd_error =3D 0; > =20 > - if (intmask & (SDHCI_INT_DATA_END_BIT | SDHCI_INT_DATA_CRC)) > + if (intmask & (SDHCI_INT_DATA_END_BIT | SDHCI_INT_DATA_CRC)) { > *data_error =3D -EILSEQ; > - else if (intmask & SDHCI_INT_DATA_TIMEOUT) > + if (intmask & SDHCI_INT_DATA_CRC) { > + if (host->cmd->opcode !=3D MMC_SEND_TUNING_BLOCK || > + host->cmd->opcode !=3D MMC_SEND_TUNING_BLOCK_HS200) { > + if (host->mmc && host->mmc->err_stats_enabled) > + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_DAT_CRC); > + } > + } > + } else if (intmask & SDHCI_INT_DATA_TIMEOUT) { > *data_error =3D -ETIMEDOUT; > - else if (intmask & SDHCI_INT_ADMA_ERROR) > + if (host->mmc && host->mmc->err_stats_enabled) > + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_DAT_TIMEOUT); > + } else if (intmask & SDHCI_INT_ADMA_ERROR) { > *data_error =3D -EIO; > - else > + if (host->mmc && host->mmc->err_stats_enabled) > + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_ADMA); > + } else > *data_error =3D 0; > =20 > /* Clear selected interrupts. */ > diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index=20 > 7afb57c..883b50b 100644 > --- a/include/linux/mmc/host.h > +++ b/include/linux/mmc/host.h > @@ -93,6 +93,23 @@ struct mmc_clk_phase_map { > =20 > struct mmc_host; > =20 > +enum mmc_err_stat { > + MMC_ERR_CMD_TIMEOUT, > + MMC_ERR_CMD_CRC, > + MMC_ERR_DAT_TIMEOUT, > + MMC_ERR_DAT_CRC, > + MMC_ERR_AUTO_CMD, > + MMC_ERR_ADMA, > + MMC_ERR_TUNING, > + MMC_ERR_CMDQ_RED, > + MMC_ERR_CMDQ_GCE, > + MMC_ERR_CMDQ_ICCE, > + MMC_ERR_REQ_TIMEOUT, > + MMC_ERR_CMDQ_REQ_TIMEOUT, > + MMC_ERR_ICE_CFG, > + MMC_ERR_MAX, > +}; > + > struct mmc_host_ops { > /* > * It is optional for the host to implement pre_req and post_req in=20 > @@ -500,6 +517,9 @@ struct mmc_host { > =20 > /* Host Software Queue support */ > bool hsq_enabled; > + u32 err_stats[MMC_ERR_MAX]; > + bool err_stats_enabled; > + bool err_state; > =20 > unsigned long private[] ____cacheline_aligned; > }; > @@ -635,6 +655,17 @@ static inline enum dma_data_direction mmc_get_dma_di= r(struct mmc_data *data) > return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE :=20 > DMA_FROM_DEVICE; } > =20 > +static inline void mmc_debugfs_err_stats_enable(struct mmc_host *mmc)=20 > +{ > + mmc->err_state =3D true; > +} > + > +static inline void mmc_debugfs_err_stats_inc(struct mmc_host *mmc, > + enum mmc_err_stat stat) { > + > + mmc->err_stats[stat] +=3D 1; > +} > + > int mmc_send_tuning(struct mmc_host *host, u32 opcode, int=20 > *cmd_error); int mmc_send_abort_tuning(struct mmc_host *host, u32=20 > opcode); int mmc_get_ext_csd(struct mmc_card *card, u8=20 > **new_ext_csd); > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a=20 > member of Code Aurora Forum, hosted by The Linux Foundation >=20