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Wed, 16 Feb 2022 11:42:09 -0800 Received: from [10.111.168.21] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Wed, 16 Feb 2022 11:42:05 -0800 Message-ID: <08a0c2b6-4270-a1a7-1685-fc322dd467ae@quicinc.com> Date: Wed, 16 Feb 2022 11:42:03 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.5.1 Subject: Re: [Freedreno] [REPOST PATCH v4 05/13] drm/msm/disp/dpu1: Add DSC for SDM845 to hw_catalog Content-Language: en-US To: Vinod Koul , Rob Clark CC: Jonathan Marek , David Airlie , , , "Abhinav Kumar" , Bjorn Andersson , , "Daniel Vetter" , Dmitry Baryshkov , References: <20220210103423.271016-1-vkoul@kernel.org> <20220210103423.271016-6-vkoul@kernel.org> From: Abhinav Kumar In-Reply-To: <20220210103423.271016-6-vkoul@kernel.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/10/2022 2:34 AM, Vinod Koul wrote: > This adds SDM845 DSC blocks into hw_catalog > > Reviewed-by: Dmitry Baryshkov > Signed-off-by: Vinod Koul Reviewed-by: Abhinav Kumar > --- > .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 20 +++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > index aa75991903a6..9c09cf318dfb 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > @@ -821,6 +821,24 @@ static const struct dpu_pingpong_cfg sc7280_pp[] = { > PP_BLK("pingpong_2", PINGPONG_2, 0x6b000, 0, sc7280_pp_sblk, -1, -1), > PP_BLK("pingpong_3", PINGPONG_3, 0x6c000, 0, sc7280_pp_sblk, -1, -1), > }; > + > +/************************************************************* > + * DSC sub blocks config > + *************************************************************/ > +#define DSC_BLK(_name, _id, _base) \ > + {\ > + .name = _name, .id = _id, \ > + .base = _base, .len = 0x140, \ > + .features = 0, \ > + } > + > +static struct dpu_dsc_cfg sdm845_dsc[] = { > + DSC_BLK("dsc_0", DSC_0, 0x80000), > + DSC_BLK("dsc_1", DSC_1, 0x80400), > + DSC_BLK("dsc_2", DSC_2, 0x80800), > + DSC_BLK("dsc_3", DSC_3, 0x80c00), > +}; > + > /************************************************************* > * INTF sub blocks config > *************************************************************/ > @@ -1124,6 +1142,8 @@ static void sdm845_cfg_init(struct dpu_mdss_cfg *dpu_cfg) > .mixer = sdm845_lm, > .pingpong_count = ARRAY_SIZE(sdm845_pp), > .pingpong = sdm845_pp, > + .dsc_count = ARRAY_SIZE(sdm845_dsc), > + .dsc = sdm845_dsc, > .intf_count = ARRAY_SIZE(sdm845_intf), > .intf = sdm845_intf, > .vbif_count = ARRAY_SIZE(sdm845_vbif),