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Message-ID: <f601db90-4239-8b14-e8a5-e1f7c10c1e9f@foss.st.com>
Date:   Thu, 17 Feb 2022 14:00:30 +0100
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Subject: Re: [PATCH v2 3/4] nvmem: core: Fix a conflict between MTD and NVMEM
 on wp-gpios property
Content-Language: en-US
To:     Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
        <miquel.raynal@bootlin.com>, <richard@nod.at>, <vigneshr@ti.com>,
        <robh+dt@kernel.org>
CC:     <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
        <linux-stm32@st-md-mailman.stormreply.com>,
        <devicetree@vger.kernel.org>, <chenshumin86@sina.com>
References: <20220131095755.8981-1-christophe.kerello@foss.st.com>
 <20220131095755.8981-4-christophe.kerello@foss.st.com>
 <1bd281d8-a576-26dc-79c3-b1a72a4a9691@linaro.org>
From:   Christophe Kerello <christophe.kerello@foss.st.com>
In-Reply-To: <1bd281d8-a576-26dc-79c3-b1a72a4a9691@linaro.org>
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Hi Srinivas,

On 2/17/22 12:01, Srinivas Kandagatla wrote:
> 
> 
> On 31/01/2022 09:57, Christophe Kerello wrote:
>> Wp-gpios property can be used on NVMEM nodes and the same property can
>> be also used on MTD NAND nodes. In case of the wp-gpios property is
>> defined at NAND level node, the GPIO management is done at NAND driver
>> level. Write protect is disabled when the driver is probed or resumed
>> and is enabled when the driver is released or suspended.
>>
>> When no partitions are defined in the NAND DT node, then the NAND DT node
>> will be passed to NVMEM framework. If wp-gpios property is defined in
>> this node, the GPIO resource is taken twice and the NAND controller
>> driver fails to probe.
>>
>> It would be possible to set config->wp_gpio at MTD level before calling
>> nvmem_register function but NVMEM framework will toggle this GPIO on
>> each write when this GPIO should only be controlled at NAND level driver
>> to ensure that the Write Protect has not been enabled.
>>
>> A way to fix this conflict is to add a new boolean flag in nvmem_config
>> named skip_wp_gpio. In case skip_wp_gpio is set, the GPIO resource will
>> be managed by the provider.
>>
>> Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
>> ---
>> Changes in v2:
>>   - rework the proposal done to fix a conflict between MTD and NVMEM on
>>     wp-gpios property.
>>
>>   drivers/nvmem/core.c           | 2 +-
>>   include/linux/nvmem-provider.h | 4 +++-
>>   2 files changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c
>> index 23a38dcf0fc4..cb40dca6a51d 100644
>> --- a/drivers/nvmem/core.c
>> +++ b/drivers/nvmem/core.c
>> @@ -771,7 +771,7 @@ struct nvmem_device *nvmem_register(const struct 
>> nvmem_config *config)
>>       if (config->wp_gpio)
>>           nvmem->wp_gpio = config->wp_gpio;
>> -    else
>> +    else if (!config->skip_wp_gpio)
>>           nvmem->wp_gpio = gpiod_get_optional(config->dev, "wp",
>>                               GPIOD_OUT_HIGH);
>>       if (IS_ERR(nvmem->wp_gpio)) {
>> diff --git a/include/linux/nvmem-provider.h 
>> b/include/linux/nvmem-provider.h
>> index 98efb7b5660d..4b480023c265 100644
>> --- a/include/linux/nvmem-provider.h
>> +++ b/include/linux/nvmem-provider.h
>> @@ -70,7 +70,8 @@ struct nvmem_keepout {
>>    * @word_size:    Minimum read/write access granularity.
>>    * @stride:    Minimum read/write access stride.
>>    * @priv:    User context passed to read/write callbacks.
>> - * @wp-gpio:   Write protect pin
>> + * @wp-gpio:    Write protect pin
>> + * @skip_wp_gpio: Write Protect pin is managed by the provider.
> 
> Can we rename this to ingore_wp as suggested by Miquel.
> 

OK, It will be part of v3.

Regards,
Christophe Kerello.

> --srini
> 
>>    *
>>    * Note: A default "nvmem<id>" name will be assigned to the device if
>>    * no name is specified in its configuration. In such case "<id>" is
>> @@ -92,6 +93,7 @@ struct nvmem_config {
>>       enum nvmem_type        type;
>>       bool            read_only;
>>       bool            root_only;
>> +    bool            skip_wp_gpio;
>>       struct device_node    *of_node;
>>       bool            no_of_node;
>>       nvmem_reg_read_t    reg_read;