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Subject: Re: [PATCH v4 2/2] clk: qcom: lpass: Add support for LPASS clock controller for SC7280
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     Rajendra Nayak <rnayak@codeaurora.org>,
        linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, robh@kernel.org, robh+dt@kernel.org,
        Taniya Das <tdas@codeaurora.org>
To:     Michael Turquette <mturquette@baylibre.com>,
        Taniya Das <tdas@codeaurora.org>
Date:   Thu, 17 Feb 2022 14:42:58 -0800
User-Agent: alot/0.10
Message-Id: <20220217224259.AED00C340E8@smtp.kernel.org>
Precedence: bulk

Quoting Taniya Das (2022-01-26 00:12:36)
> diff --git a/drivers/clk/qcom/lpassaudiocc-sc7280.c b/drivers/clk/qcom/lp=
assaudiocc-sc7280.c
> new file mode 100644
> index 000000000000..c97ead75f02a
> --- /dev/null
> +++ b/drivers/clk/qcom/lpassaudiocc-sc7280.c
> @@ -0,0 +1,838 @@
> +// SPDX-License-Identifier: GPL-2.0-only
[...]
> +
> +static int lpass_audio_cc_sc7280_probe(struct platform_device *pdev)
> +{
> +       const struct qcom_cc_desc *desc;
> +       struct regmap *regmap;
> +       int ret;
> +
> +       ret =3D lpassaudio_create_pm_clks(pdev);
> +       if (ret)
> +               return ret;
> +
> +       lpass_audio_cc_sc7280_regmap_config.name =3D "lpassaudio_cc";
> +       lpass_audio_cc_sc7280_regmap_config.max_register =3D 0x2f000;
> +       desc =3D &lpass_audio_cc_sc7280_desc;
> +
> +       regmap =3D qcom_cc_map(pdev, desc);
> +       if (IS_ERR(regmap)) {
> +               pm_runtime_disable(&pdev->dev);
> +               return PTR_ERR(regmap);
> +       }
> +
> +       clk_zonda_pll_configure(&lpass_audio_cc_pll, regmap, &lpass_audio=
_cc_pll_config);
> +
> +       ret =3D qcom_cc_really_probe(pdev, &lpass_audio_cc_sc7280_desc, r=
egmap);
> +       if (ret) {
> +               dev_err(&pdev->dev, "Failed to register LPASS AUDIO CC cl=
ocks\n");
> +               pm_runtime_disable(&pdev->dev);
> +               return ret;
> +       }
> +
> +       /* PLL settings */
> +       regmap_write(regmap, 0x4, 0x3b);
> +       regmap_write(regmap, 0x8, 0xff05);

Shouldn't this be done before registering the clks? So after
zonda_pll_configure?

> +
> +       pm_runtime_mark_last_busy(&pdev->dev);
> +       pm_runtime_put_autosuspend(&pdev->dev);
> +       pm_runtime_put_sync(&pdev->dev);