Received: by 2002:a05:6a10:7420:0:0:0:0 with SMTP id hk32csp840040pxb; Thu, 17 Feb 2022 16:16:35 -0800 (PST) X-Google-Smtp-Source: ABdhPJxA/KdbbP/HFPTYHFdwgErAKK+tURa5QunnOnlXTKI6y6dFYjPQ/JmWydoFrjJM9mVhJ2qv X-Received: by 2002:a05:6a00:815:b0:4c0:2388:73c6 with SMTP id m21-20020a056a00081500b004c0238873c6mr5281874pfk.69.1645143394852; Thu, 17 Feb 2022 16:16:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1645143394; cv=none; d=google.com; s=arc-20160816; b=c4D6x5/LHkl/vcyYohc98yxppE47M1XMcvTkYC4POpddIGSdo88sFI6Lhn17ASXhQC 75F0+hfzJ6rp5M9PMjLeJCjl1BxkiMVDm6L0VppAQ9pdH6yes50iPRKfYY7lRZ3P6pqr T4qhmfNIiBqi4rw7LaQCd4dZmyTcu+TxhF6Q8CA93SkjKV1LAhWBjxlhdkIgYm/nfRIO i529Kg0DBDczVRZ3DE9miE8hvJPvuy+LRFLAQnDBgGHrbPye5nvrFSyk01gtK9l0E6JZ MGQlBzzDlOAzzlp8cQubxkcphh7rmfSCq+iYVoDwOCwGCeZk8asf3EPRtRqJxSWxeSUe YtsA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date:dkim-signature; bh=z1q+PPoygA80lRFmhMSW1T+Gpqj/0Q4oQCOQD+/QCAU=; b=vK5gFJf4glMAKesnRn7pWV/11ftWxX9odl0WNCFbrkiMT9cUA+C4USy0h4YvIh2QcA K/gP1mwmYd7RbzzDLSbL8jilZICBd5w28WQnRzS7g5CVVP58y0/JDWPguSNqvOeYy0HX k67EgMid4UmEf82YxCEjGnmsq9JComVLmXGqa2Ofbzp2XM3IWZDywkzqw8bgdGuZCzIe x53tyUD/qzZehCooCEvhNb0ktfARRRIHh7IPrVk1ejWPix6bls7I+wHfkmS+8yBMzM5z VCYNtYNZ2Egjqy8riT2ob3LLlQKO//i6r+exOiIKe+1BW67Wh34uXvx2mQrqyMaBsNfz vcFQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=eBIPu7ab; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net. [2620:137:e000::1:18]) by mx.google.com with ESMTPS id d6si20746573pll.363.2022.02.17.16.16.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 16:16:34 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=eBIPu7ab; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 8CE1F3F31D; Thu, 17 Feb 2022 15:40:56 -0800 (PST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240935AbiBQNcj (ORCPT + 99 others); Thu, 17 Feb 2022 08:32:39 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:53134 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240936AbiBQNcg (ORCPT ); Thu, 17 Feb 2022 08:32:36 -0500 Received: from vps0.lunn.ch (vps0.lunn.ch [185.16.172.187]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2F281D4213; Thu, 17 Feb 2022 05:32:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=z1q+PPoygA80lRFmhMSW1T+Gpqj/0Q4oQCOQD+/QCAU=; b=eBIPu7ab4R1QeKCzhqgGZ4ej2u h6iTruoEzP+w8PDWKwK4B3mmk+YQ/I0Ca56oKB5SYYV37uxAlPc5Ots068mt2dqUcjSAv9mXO55Hf 2Nf9rVdQoVIRNZj7y0OsuAILrfheAwEDCq7HXR2EIlA4FXqkxWK9bRTP0DlH/ggKle/Y=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1nKgtH-006MoH-1V; Thu, 17 Feb 2022 14:32:11 +0100 Date: Thu, 17 Feb 2022 14:32:11 +0100 From: Andrew Lunn To: Alvin =?utf-8?Q?=C5=A0ipraga?= Cc: Luiz Angelo Daros de Luca , Alvin =?utf-8?Q?=C5=A0ipraga?= , Linus Walleij , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Michael Rasmussen , =?utf-8?B?QXLEsW7DpyDDnE5BTA==?= , "open list:NETWORKING DRIVERS" , open list Subject: Re: [PATCH net-next 0/2] net: dsa: realtek: fix PHY register read corruption Message-ID: References: <20220216160500.2341255-1-alvin@pqrs.dk> <87k0dusmar.fsf@bang-olufsen.dk> <878ruasjd8.fsf@bang-olufsen.dk> <877d9tr66o.fsf@bang-olufsen.dk> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <877d9tr66o.fsf@bang-olufsen.dk> X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > If you have the patience to answer a few more questions: > > 1. You mentioned in an earlier mail that the mdio_lock is used mostly by > PHY drivers to synchronize their access to the MDIO bus, for a single > read or write. You also mentioned that for switches which have a more > involved access pattern (for instance to access switch management > registers), a higher lock is required. In realtek-mdio this is the case: > we do a couple of reads and writes over the MDIO bus to access the > switch registers. Moreover, the mdio_lock is held for the duration of > these MDIO bus reads/writes. Do you mean to say that one should rather > take a higher-level lock and only lock/unlock the mdio_lock on a > per-read or per-write basis? Put another way, should this: > > static int realtek_mdio_read(void *ctx, u32 reg, u32 *val) > { > /* ... */ > > mutex_lock(&bus->mdio_lock); > > bus->write(bus, priv->mdio_addr, ...); It would be better to use __mdiobus_write() > bus->write(bus, priv->mdio_addr, ...); > bus->write(bus, priv->mdio_addr, ...); > bus->read(bus, priv->mdio_addr, ...); __mdiobus_read() > /* ... */ > > mutex_unlock(&bus->mdio_lock); > > return ret; > } You can do this. > rather look like this?: > > static int realtek_mdio_read(void *ctx, u32 reg, u32 *val) > { > /* ... */ > > mutex_lock(&my_realtek_driver_lock); /* synchronize concurrent realtek_mdio_{read,write} */ > > mdiobus_write(bus, priv->mdio_addr, ...); /* mdio_lock locked/unlocked here */ > mdiobus_write(bus, priv->mdio_addr, ...); /* ditto */ > mdiobus_write(bus, priv->mdio_addr, ...); /* ditto */ > mdiobus_read(bus, priv->mdio_addr, ...); /* ditto */ > > /* ... */ > > mutex_unlock(&my_realtek_driver_lock); > > return ret; > } This would also work. The advantage of this is when you have multiple switches on one MDIO bus, you can allow parallel operations on those switches. Also, if there are PHYs on the MDIO bus as well as the switch, the PHYs can be accessed as well. If you are only doing 3 writes and read, it probably does not matter. If you are going to do a lot of accesses, maybe read all the MIB values, allowing access to the PHYs at the same time would be nice. > 2. Is the nested locking only relevant for DSA switches which offer > another MDIO bus? Or should all switch drivers do this, on the basis > that, feasibly, one could connect my Realtek switch to the MDIO bus of a > mv88e6xxx switch? In that case, and assuming the latter form of > raeltek_mdio_read above, should one use the mdiobus_{read,write}_nested > functions instead? I would suggest you start with plain mdiobus_{read,write}. Using the _nested could potentially hide a deadlock. If somebody does build hardware with this sort of chaining, we can change to the _nested calls. Andrew