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[47.72.151.34]) by smtp.gmail.com with ESMTPSA id ob12sm5222899pjb.5.2022.02.18.03.28.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Feb 2022 03:28:09 -0800 (PST) From: Barry Song <21cnbao@gmail.com> X-Google-Original-From: Barry Song To: shankerd@codeaurora.org, will@kernel.org Cc: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, marc.zyngier@arm.com, scampbel@codeaurora.org, tglx@linutronix.de, tspeier@codeaurora.org, vikrams@codeaurora.org Subject: Re: [PATCH] irqchip/gic-v3: Use wmb() instead of smb_wmb() in gic_raise_softirq() Date: Fri, 18 Feb 2022 19:27:52 +0800 Message-Id: <20220218112752.9811-1-song.bao.hua@hisilicon.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <1517443422-30693-1-git-send-email-shankerd@codeaurora.org> References: <1517443422-30693-1-git-send-email-shankerd@codeaurora.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > --- a/drivers/irqchip/irq-gic-v3.c > +++ b/drivers/irqchip/irq-gic-v3.c > @@ -688,7 +688,7 @@ static void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) > * Ensure that stores to Normal memory are visible to the > * other CPUs before issuing the IPI. > */ > - smp_wmb(); > + wmb(); Sorry for waking up the old thread. isn't dsb(ishst) enough here as we only need to guarantee the visibility of data to other CPUs in smp inner domain before we send the ipi? > > for_each_cpu(cpu, mask) { > u64 cluster_id = MPIDR_TO_SGI_CLUSTER_ID(cpu_logical_map(cpu)); Thanks Barry