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From:   Chun-Kuang Hu <chunkuang.hu@kernel.org>
Date:   Mon, 21 Feb 2022 10:40:35 +0800
Message-ID: <CAAOTY_8V91XH4sKeRfSz6hRPhXm15GBkQ76LWtfBBU5cAtWMqA@mail.gmail.com>
Subject: Re: [PATCH v8 08/19] drm/mediatek: dpi: move dimension mask to board config
To:     Guillaume Ranquet <granquet@baylibre.com>
Cc:     Chun-Kuang Hu <chunkuang.hu@kernel.org>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        David Airlie <airlied@linux.ie>,
        Daniel Vetter <daniel@ffwll.ch>,
        Rob Herring <robh+dt@kernel.org>,
        Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
        Maxime Ripard <mripard@kernel.org>,
        Thomas Zimmermann <tzimmermann@suse.de>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        Chunfeng Yun <chunfeng.yun@mediatek.com>,
        Kishon Vijay Abraham I <kishon@ti.com>,
        Vinod Koul <vkoul@kernel.org>, deller@gmx.de,
        CK Hu <ck.hu@mediatek.com>, Jitao Shi <jitao.shi@mediatek.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>,
        DRI Development <dri-devel@lists.freedesktop.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@lists.infradead.org>,
        DTML <devicetree@vger.kernel.org>,
        linux-kernel <linux-kernel@vger.kernel.org>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>,
        linux-phy@lists.infradead.org, linux-fbdev@vger.kernel.org
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HI, Guillaume:

Guillaume Ranquet <granquet@baylibre.com> =E6=96=BC 2022=E5=B9=B42=E6=9C=88=
18=E6=97=A5 =E9=80=B1=E4=BA=94 =E4=B8=8B=E5=8D=8810:56=E5=AF=AB=E9=81=93=EF=
=BC=9A
>
> Add flexibility by moving the dimension mask to the board config

After change 'board' to 'SoC',

Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>

>
> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_dpi.c | 26 ++++++++++++++++----------
>  1 file changed, 16 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediate=
k/mtk_dpi.c
> index 454f8563efae4..8ca3455ed64ee 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -127,6 +127,8 @@ struct mtk_dpi_conf {
>         u32 num_output_fmts;
>         bool is_ck_de_pol;
>         bool swap_input_support;
> +       // Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and VSYNC_PORCH (no =
shift)
> +       u32 dimension_mask;
>         const struct mtk_dpi_yc_limit *limit;
>  };
>
> @@ -156,30 +158,30 @@ static void mtk_dpi_disable(struct mtk_dpi *dpi)
>  static void mtk_dpi_config_hsync(struct mtk_dpi *dpi,
>                                  struct mtk_dpi_sync_param *sync)
>  {
> -       mtk_dpi_mask(dpi, DPI_TGEN_HWIDTH,
> -                    sync->sync_width << HPW, HPW_MASK);
> -       mtk_dpi_mask(dpi, DPI_TGEN_HPORCH,
> -                    sync->back_porch << HBP, HBP_MASK);
> +       mtk_dpi_mask(dpi, DPI_TGEN_HWIDTH, sync->sync_width << HPW,
> +                    dpi->conf->dimension_mask << HPW);
> +       mtk_dpi_mask(dpi, DPI_TGEN_HPORCH, sync->back_porch << HBP,
> +                    dpi->conf->dimension_mask << HBP);
>         mtk_dpi_mask(dpi, DPI_TGEN_HPORCH, sync->front_porch << HFP,
> -                    HFP_MASK);
> +                    dpi->conf->dimension_mask << HFP);
>  }
>
>  static void mtk_dpi_config_vsync(struct mtk_dpi *dpi,
>                                  struct mtk_dpi_sync_param *sync,
>                                  u32 width_addr, u32 porch_addr)
>  {
> -       mtk_dpi_mask(dpi, width_addr,
> -                    sync->sync_width << VSYNC_WIDTH_SHIFT,
> -                    VSYNC_WIDTH_MASK);
>         mtk_dpi_mask(dpi, width_addr,
>                      sync->shift_half_line << VSYNC_HALF_LINE_SHIFT,
>                      VSYNC_HALF_LINE_MASK);
> +       mtk_dpi_mask(dpi, width_addr,
> +                    sync->sync_width << VSYNC_WIDTH_SHIFT,
> +                    dpi->conf->dimension_mask << VSYNC_WIDTH_SHIFT);
>         mtk_dpi_mask(dpi, porch_addr,
>                      sync->back_porch << VSYNC_BACK_PORCH_SHIFT,
> -                    VSYNC_BACK_PORCH_MASK);
> +                    dpi->conf->dimension_mask << VSYNC_BACK_PORCH_SHIFT)=
;
>         mtk_dpi_mask(dpi, porch_addr,
>                      sync->front_porch << VSYNC_FRONT_PORCH_SHIFT,
> -                    VSYNC_FRONT_PORCH_MASK);
> +                    dpi->conf->dimension_mask << VSYNC_FRONT_PORCH_SHIFT=
);
>  }
>
>  static void mtk_dpi_config_vsync_lodd(struct mtk_dpi *dpi,
> @@ -813,6 +815,7 @@ static const struct mtk_dpi_conf mt8173_conf =3D {
>         .num_output_fmts =3D ARRAY_SIZE(mt8173_output_fmts),
>         .is_ck_de_pol =3D true,
>         .swap_input_support =3D true,
> +       .dimension_mask =3D HPW_MASK,
>         .limit =3D &mtk_dpi_limit,
>  };
>
> @@ -825,6 +828,7 @@ static const struct mtk_dpi_conf mt2701_conf =3D {
>         .num_output_fmts =3D ARRAY_SIZE(mt8173_output_fmts),
>         .is_ck_de_pol =3D true,
>         .swap_input_support =3D true,
> +       .dimension_mask =3D HPW_MASK,
>         .limit =3D &mtk_dpi_limit,
>  };
>
> @@ -836,6 +840,7 @@ static const struct mtk_dpi_conf mt8183_conf =3D {
>         .num_output_fmts =3D ARRAY_SIZE(mt8183_output_fmts),
>         .is_ck_de_pol =3D true,
>         .swap_input_support =3D true,
> +       .dimension_mask =3D HPW_MASK,
>         .limit =3D &mtk_dpi_limit,
>  };
>
> @@ -847,6 +852,7 @@ static const struct mtk_dpi_conf mt8192_conf =3D {
>         .num_output_fmts =3D ARRAY_SIZE(mt8173_output_fmts),
>         .is_ck_de_pol =3D true,
>         .swap_input_support =3D true,
> +       .dimension_mask =3D HPW_MASK,
>         .limit =3D &mtk_dpi_limit,
>  };
>
> --
> 2.34.1
>