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Sun, 20 Feb 2022 18:43:33 -0800 (PST) X-Gm-Message-State: AOAM530TTkinVBVwygfABEootZq89pdRIduP6dcbuTx9QENDpvOpi4xq rgjuhB7AetW9y+KGm1a+KwEk8egj6bhFbeU+8w== X-Received: by 2002:a17:906:b348:b0:6cf:5b66:2f80 with SMTP id cd8-20020a170906b34800b006cf5b662f80mr13893213ejb.638.1645411411757; Sun, 20 Feb 2022 18:43:31 -0800 (PST) MIME-Version: 1.0 References: <20220218145437.18563-1-granquet@baylibre.com> <20220218145437.18563-10-granquet@baylibre.com> In-Reply-To: <20220218145437.18563-10-granquet@baylibre.com> From: Chun-Kuang Hu Date: Mon, 21 Feb 2022 10:43:19 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v8 09/19] drm/mediatek: dpi: move dimension_mask to board config To: Guillaume Ranquet Cc: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Rob Herring , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Matthias Brugger , Chunfeng Yun , Kishon Vijay Abraham I , Vinod Koul , deller@gmx.de, CK Hu , Jitao Shi , AngeloGioacchino Del Regno , DRI Development , "moderated list:ARM/Mediatek SoC support" , DTML , linux-kernel , Linux ARM , linux-phy@lists.infradead.org, linux-fbdev@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Guillaume: Guillaume Ranquet =E6=96=BC 2022=E5=B9=B42=E6=9C=88= 18=E6=97=A5 =E9=80=B1=E4=BA=94 =E4=B8=8B=E5=8D=8810:56=E5=AF=AB=E9=81=93=EF= =BC=9A > > Add flexibility by moving the dimension mask to board config Replace 'board' with 'SoC'. > > Signed-off-by: Guillaume Ranquet > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 12 ++++++++++-- > 1 file changed, 10 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediate= k/mtk_dpi.c > index 8ca3455ed64ee..0d3acd08ea358 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -129,6 +129,8 @@ struct mtk_dpi_conf { > bool swap_input_support; > // Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and VSYNC_PORCH (no = shift) > u32 dimension_mask; > + // Mask used for HSIZE and VSIZE (no shift) /* ... */ Regards, Chun-Kuang. > + u32 hvsize_mask; > const struct mtk_dpi_yc_limit *limit; > }; > > @@ -243,8 +245,10 @@ static void mtk_dpi_config_interface(struct mtk_dpi = *dpi, bool inter) > > static void mtk_dpi_config_fb_size(struct mtk_dpi *dpi, u32 width, u32 h= eight) > { > - mtk_dpi_mask(dpi, DPI_SIZE, width << HSIZE, HSIZE_MASK); > - mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE, VSIZE_MASK); > + mtk_dpi_mask(dpi, DPI_SIZE, width << HSIZE, > + dpi->conf->hvsize_mask << HSIZE); > + mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE, > + dpi->conf->hvsize_mask << VSIZE); > } > > static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi) > @@ -816,6 +820,7 @@ static const struct mtk_dpi_conf mt8173_conf =3D { > .is_ck_de_pol =3D true, > .swap_input_support =3D true, > .dimension_mask =3D HPW_MASK, > + .hvsize_mask =3D HSIZE_MASK, > .limit =3D &mtk_dpi_limit, > }; > > @@ -829,6 +834,7 @@ static const struct mtk_dpi_conf mt2701_conf =3D { > .is_ck_de_pol =3D true, > .swap_input_support =3D true, > .dimension_mask =3D HPW_MASK, > + .hvsize_mask =3D HSIZE_MASK, > .limit =3D &mtk_dpi_limit, > }; > > @@ -841,6 +847,7 @@ static const struct mtk_dpi_conf mt8183_conf =3D { > .is_ck_de_pol =3D true, > .swap_input_support =3D true, > .dimension_mask =3D HPW_MASK, > + .hvsize_mask =3D HSIZE_MASK, > .limit =3D &mtk_dpi_limit, > }; > > @@ -853,6 +860,7 @@ static const struct mtk_dpi_conf mt8192_conf =3D { > .is_ck_de_pol =3D true, > .swap_input_support =3D true, > .dimension_mask =3D HPW_MASK, > + .hvsize_mask =3D HSIZE_MASK, > .limit =3D &mtk_dpi_limit, > }; > > -- > 2.34.1 >