Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
From:   "Zhang, Tianfei" <tianfei.zhang@intel.com>
To:     "Wu, Hao" <hao.wu@intel.com>, "trix@redhat.com" <trix@redhat.com>,
        "mdf@kernel.org" <mdf@kernel.org>,
        "Xu, Yilun" <yilun.xu@intel.com>,
        "linux-fpga@vger.kernel.org" <linux-fpga@vger.kernel.org>,
        "linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
CC:     "corbet@lwn.net" <corbet@lwn.net>
Subject: RE: [PATCH v1 2/7] fpga: dfl: check feature type before parse irq
 info
Thread-Topic: [PATCH v1 2/7] fpga: dfl: check feature type before parse irq
 info
Thread-Index: AQHYIZYutGpfsM893k+7OxgKTgvvjqyViUuAgAggQKA=
Date:   Mon, 21 Feb 2022 07:41:14 +0000
Message-ID: <BN9PR11MB54833D7636348D62F931526CE33A9@BN9PR11MB5483.namprd11.prod.outlook.com>
References: <20220214112619.219761-1-tianfei.zhang@intel.com>
 <20220214112619.219761-3-tianfei.zhang@intel.com>
 <DM6PR11MB38193BEA6566608EACAAB87785359@DM6PR11MB3819.namprd11.prod.outlook.com>
In-Reply-To: <DM6PR11MB38193BEA6566608EACAAB87785359@DM6PR11MB3819.namprd11.prod.outlook.com>
Accept-Language: zh-CN, en-US
Content-Language: en-US
dlp-product: dlpe-windows
dlp-version: 11.6.200.16
dlp-reaction: no-action
x-ms-exchange-antispam-messagedata-chunkcount: 1
x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?HhnuM7HtjJTHyhrRZbE+3PaJ8hHY20f73E/lZYdrv2fWnNkiUtoytBI5i15S?=
 =?us-ascii?Q?0fE+V4XUGIzkCu4g63d51C/uXW2aoEwIh48vBCbtsD8PssZvfWKJrAJl4QrB?=
 =?us-ascii?Q?Pjm6w9+L0EJERFdeJYioie72EIY0rHrVBCvdR+brHypeMD9rEAARPOF1WT/A?=
 =?us-ascii?Q?KaKYg1tdvPQLW8GGkfxDfOobwtvW4/G3qd86H3+6wIb3VwUN/Ea8WtFkAS1M?=
 =?us-ascii?Q?lDuKiHeBH2NSvJSn6NR6VQppMtp7qG29LyxIJMgKkFK8KCwNVfLR2eEvQEm0?=
 =?us-ascii?Q?E1COyczuicIa3bC2PNHzIfX7v/MnyYnGFiVxH1PYP2hAYaaU7qKnLZrV18Oq?=
 =?us-ascii?Q?zYliyuEwCORNOM3Nwb9VuM4+8arfpTQrTmk722ERyMBPXO2NzRBruxDVCYco?=
 =?us-ascii?Q?yeRfsQ0SrWhbR+IFIUzqSIu6MEzDB0m/9Uv7cOhD9M7tv/ctTAv9G0M6MbQr?=
 =?us-ascii?Q?UfqYvYH/AkmHjZPF8m8a2Rj6GnFH6UrFJo1Kg5gy/T++D9IZFEnAmrUV5X5K?=
 =?us-ascii?Q?x0o0GByzxCHvMFBSkBZNyUsOvaIqljrdpdvHzwG15CtWpdHgAJRA7wfGJVno?=
 =?us-ascii?Q?XA360u4FdEsS5H8H1NtnQuHH42Y8U9oBXpCBh7BYoruxWM9Jy4kuaYezSz5D?=
 =?us-ascii?Q?wzDzxW0uNjbaybTs6MaeHuhtcW2zCfdTS2yqqotXbXd1bkGcx63s/+KcefHa?=
 =?us-ascii?Q?4v74gbrgIFlBDq8Pyl3v8qe0x7c/9bw0pXtYGLHQ5LPnQToSTCqHQYnUUUiI?=
 =?us-ascii?Q?4Sfya4zr1MG0/UrZuCrkbF+7lLUiuk0Lsg+MEpDl0rtEGC9wJiwD5L26IxeS?=
 =?us-ascii?Q?xsVtY+P/DnMfAUZLGFIcZ/04kRZsbpX4JKldiQ2aMoK2dm0yVrA9tBtZ8g7P?=
 =?us-ascii?Q?13pPL5bkxJH/Zw2GTeurFe9y2M6YwQfcN2VqOzLyYBS7PTz/+fW/ijy7JnoX?=
 =?us-ascii?Q?TnbzqJgfgWxYnc1PiXWzuLb/cY68o1MfBC7rKVoy1gGCmVVIoXPCocVYbyNz?=
 =?us-ascii?Q?ULNX7XHcBPGyBuJgYI8mAqN2wRHs0O/3TTbShDj5RPAUXZALc9rF5M/ddP4S?=
 =?us-ascii?Q?7Xl9g5EO/pnlY7if9BQRWoNeb1oKNet6dl1FkdhfJXs6mfWBpkuFipzDxahz?=
 =?us-ascii?Q?kJGVYwjaS8Ea1GRyKyeIIRAujjBPuUU54Y0ncLGsaOspJyZkyBPoiT6zKjV1?=
 =?us-ascii?Q?Lb/jFnFKDW0ov1MmwuhQUBo013ho+ioNUmKUb8eKl0R3QB/b1MTd1BrUO3SN?=
 =?us-ascii?Q?bsCEXvSjY+c96+I1lh+6ew1TCr27d5AlpatmgJ6p6GMAn8LBY0b8lygIA8aq?=
 =?us-ascii?Q?MfkAk27V5V19GdX+hMBobVdDNdtFi49VbhilFcGKEMKlo/xaOwC3bT2Zvlo3?=
 =?us-ascii?Q?BOx7qhZD08ff9Ff2dwk3qOWm0rRILa5fzIA4yHilpfsMTEvF32UyyvsHIl1y?=
 =?us-ascii?Q?0VIwrkztjf617GSN5wjzWZgTXJPmBXz+UfdpZ15c3jIdRRIWIMhZhaF5cD57?=
 =?us-ascii?Q?5DAakAvb5xyl49gxh6PiPWjPJY4WBzrD+gJeE4p0muiobuhnCItmjVJr/kf0?=
 =?us-ascii?Q?Fh9PJY1j1YyCeGsTRT/xqCvaIGyI2hgltuDmeYsrAxE20WHoJAzwobFotR0M?=
 =?us-ascii?Q?EGvMOwpXFApUZDN5/4qslJk=3D?=
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-AuthSource: BN9PR11MB5483.namprd11.prod.outlook.com
X-MS-Exchange-CrossTenant-Network-Message-Id: dc1360f9-7291-4ebd-7304-08d9f50d8998
X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Feb 2022 07:41:14.0235
 (UTC)
X-MS-Exchange-CrossTenant-fromentityheader: Hosted
X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d
X-MS-Exchange-CrossTenant-mailboxtype: HOSTED
X-MS-Exchange-CrossTenant-userprincipalname: pu6q9izYVgpW12v5CojK+fkk4K97b3qD8qfLowpCYyIiTScCH6KNzXvxm2UsuvaxeKYzEyX57tnMYBUIRjWw6A==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR11MB3807
X-OriginatorOrg: intel.com
X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,
        DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,
        SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham
        autolearn_force=no version=3.4.6
X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on
        lindbergh.monkeyblade.net
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org


> -----Original Message-----
> From: Wu, Hao <hao.wu@intel.com>
> Sent: Wednesday, February 16, 2022 11:35 AM
> To: Zhang, Tianfei <tianfei.zhang@intel.com>; trix@redhat.com;
> mdf@kernel.org; Xu, Yilun <yilun.xu@intel.com>; linux-fpga@vger.kernel.or=
g;
> linux-doc@vger.kernel.org; linux-kernel@vger.kernel.org
> Cc: corbet@lwn.net
> Subject: Re: [PATCH v1 2/7] fpga: dfl: check feature type before parse ir=
q info
>=20
> > Subject: [PATCH v1 2/7] fpga: dfl: check feature type before parse irq
> > info
> >
> > From: Tianfei Zhang <tianfei.zhang@intel.com>
> >
> > The feature ID of "Port User Interrupt" and the "PMCI Subsystem" are
> > identical, 0x12, but one is for FME, other is for Port. It should
> > check the feature type While parsing the irq info in
> > parse_feature_irqs().
> >
> > Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
> > ---
> >  drivers/fpga/dfl.c | 11 +++++++++++
> >  1 file changed, 11 insertions(+)
> >
> > diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index
> > 599bb21d86af..26f8cf890700 100644
> > --- a/drivers/fpga/dfl.c
> > +++ b/drivers/fpga/dfl.c
> > @@ -940,9 +940,14 @@ static int parse_feature_irqs(struct
> > build_feature_devs_info *binfo,  {
> >  	void __iomem *base =3D binfo->ioaddr + ofst;
> >  	unsigned int i, ibase, inr =3D 0;
> > +	enum dfl_id_type type;
> >  	int virq;
> >  	u64 v;
> >
> > +	type =3D feature_dev_id_type(binfo->feature_dev);
> > +	if (type >=3D DFL_ID_MAX)
> > +		return -EINVAL;
> > +
>=20
> You don't have to check this, it doesn't allow creating feature dev with =
type >=3D
> DFL_ID_MAX.

I agree, I will fix on next version.

>=20
> >  	/*
> >  	 * Ideally DFL framework should only read info from DFL header, but
> >  	 * current version DFL only provides mmio resources information for
> > @@ -959,16 +964,22 @@ static int parse_feature_irqs(struct
> > build_feature_devs_info *binfo,
> >  	 */
> >  	switch (fid) {
> >  	case PORT_FEATURE_ID_UINT:
> > +		if (type !=3D PORT_ID)
> > +			break;
> >  		v =3D readq(base + PORT_UINT_CAP);
> >  		ibase =3D FIELD_GET(PORT_UINT_CAP_FST_VECT, v);
> >  		inr =3D FIELD_GET(PORT_UINT_CAP_INT_NUM, v);
> >  		break;
> >  	case PORT_FEATURE_ID_ERROR:
> > +		if (type !=3D PORT_ID)
> > +			break;
> >  		v =3D readq(base + PORT_ERROR_CAP);
> >  		ibase =3D FIELD_GET(PORT_ERROR_CAP_INT_VECT, v);
> >  		inr =3D FIELD_GET(PORT_ERROR_CAP_SUPP_INT, v);
> >  		break;
> >  	case FME_FEATURE_ID_GLOBAL_ERR:
> > +		if (type !=3D FME_ID)
> > +			break;
> >  		v =3D readq(base + FME_ERROR_CAP);
> >  		ibase =3D FIELD_GET(FME_ERROR_CAP_INT_VECT, v);
> >  		inr =3D FIELD_GET(FME_ERROR_CAP_SUPP_INT, v);
> > --
> > 2.17.1