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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN9PR11MB5483.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: dc1360f9-7291-4ebd-7304-08d9f50d8998 X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Feb 2022 07:41:14.0235 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: pu6q9izYVgpW12v5CojK+fkk4K97b3qD8qfLowpCYyIiTScCH6KNzXvxm2UsuvaxeKYzEyX57tnMYBUIRjWw6A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR11MB3807 X-OriginatorOrg: intel.com X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Wu, Hao > Sent: Wednesday, February 16, 2022 11:35 AM > To: Zhang, Tianfei ; trix@redhat.com; > mdf@kernel.org; Xu, Yilun ; linux-fpga@vger.kernel.or= g; > linux-doc@vger.kernel.org; linux-kernel@vger.kernel.org > Cc: corbet@lwn.net > Subject: Re: [PATCH v1 2/7] fpga: dfl: check feature type before parse ir= q info >=20 > > Subject: [PATCH v1 2/7] fpga: dfl: check feature type before parse irq > > info > > > > From: Tianfei Zhang > > > > The feature ID of "Port User Interrupt" and the "PMCI Subsystem" are > > identical, 0x12, but one is for FME, other is for Port. It should > > check the feature type While parsing the irq info in > > parse_feature_irqs(). > > > > Signed-off-by: Tianfei Zhang > > --- > > drivers/fpga/dfl.c | 11 +++++++++++ > > 1 file changed, 11 insertions(+) > > > > diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index > > 599bb21d86af..26f8cf890700 100644 > > --- a/drivers/fpga/dfl.c > > +++ b/drivers/fpga/dfl.c > > @@ -940,9 +940,14 @@ static int parse_feature_irqs(struct > > build_feature_devs_info *binfo, { > > void __iomem *base =3D binfo->ioaddr + ofst; > > unsigned int i, ibase, inr =3D 0; > > + enum dfl_id_type type; > > int virq; > > u64 v; > > > > + type =3D feature_dev_id_type(binfo->feature_dev); > > + if (type >=3D DFL_ID_MAX) > > + return -EINVAL; > > + >=20 > You don't have to check this, it doesn't allow creating feature dev with = type >=3D > DFL_ID_MAX. I agree, I will fix on next version. >=20 > > /* > > * Ideally DFL framework should only read info from DFL header, but > > * current version DFL only provides mmio resources information for > > @@ -959,16 +964,22 @@ static int parse_feature_irqs(struct > > build_feature_devs_info *binfo, > > */ > > switch (fid) { > > case PORT_FEATURE_ID_UINT: > > + if (type !=3D PORT_ID) > > + break; > > v =3D readq(base + PORT_UINT_CAP); > > ibase =3D FIELD_GET(PORT_UINT_CAP_FST_VECT, v); > > inr =3D FIELD_GET(PORT_UINT_CAP_INT_NUM, v); > > break; > > case PORT_FEATURE_ID_ERROR: > > + if (type !=3D PORT_ID) > > + break; > > v =3D readq(base + PORT_ERROR_CAP); > > ibase =3D FIELD_GET(PORT_ERROR_CAP_INT_VECT, v); > > inr =3D FIELD_GET(PORT_ERROR_CAP_SUPP_INT, v); > > break; > > case FME_FEATURE_ID_GLOBAL_ERR: > > + if (type !=3D FME_ID) > > + break; > > v =3D readq(base + FME_ERROR_CAP); > > ibase =3D FIELD_GET(FME_ERROR_CAP_INT_VECT, v); > > inr =3D FIELD_GET(FME_ERROR_CAP_SUPP_INT, v); > > -- > > 2.17.1