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From:   Chun-Kuang Hu <chunkuang.hu@kernel.org>
Date:   Mon, 21 Feb 2022 11:33:02 +0800
Message-ID: <CAAOTY__3K=2ommcNcfow7kKkOQpL7D0_YuqNBB9rQWjhz7e_DA@mail.gmail.com>
Subject: Re: [PATCH v8 12/19] drm/mediatek: dpi: move the csc_enable bit to
 board config
To:     Guillaume Ranquet <granquet@baylibre.com>
Cc:     Chun-Kuang Hu <chunkuang.hu@kernel.org>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        David Airlie <airlied@linux.ie>,
        Daniel Vetter <daniel@ffwll.ch>,
        Rob Herring <robh+dt@kernel.org>,
        Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
        Maxime Ripard <mripard@kernel.org>,
        Thomas Zimmermann <tzimmermann@suse.de>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        Chunfeng Yun <chunfeng.yun@mediatek.com>,
        Kishon Vijay Abraham I <kishon@ti.com>,
        Vinod Koul <vkoul@kernel.org>, deller@gmx.de,
        CK Hu <ck.hu@mediatek.com>, Jitao Shi <jitao.shi@mediatek.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>,
        DRI Development <dri-devel@lists.freedesktop.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@lists.infradead.org>,
        DTML <devicetree@vger.kernel.org>,
        linux-kernel <linux-kernel@vger.kernel.org>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>,
        linux-phy@lists.infradead.org, linux-fbdev@vger.kernel.org
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Hi, Guillaume:

Guillaume Ranquet <granquet@baylibre.com> =E6=96=BC 2022=E5=B9=B42=E6=9C=88=
18=E6=97=A5 =E9=80=B1=E4=BA=94 =E4=B8=8B=E5=8D=8810:56=E5=AF=AB=E9=81=93=EF=
=BC=9A
>
> Add flexibility by moving the csc_enable bit to board config

After replace 'board' with 'SoC',

Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>

>
> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_dpi.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediate=
k/mtk_dpi.c
> index fcf88dcd8b89d..be99399faf1bb 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -133,6 +133,7 @@ struct mtk_dpi_conf {
>         u32 hvsize_mask;
>         u32 channel_swap_shift;
>         u32 yuv422_en_bit;
> +       u32 csc_enable_bit;
>         const struct mtk_dpi_yc_limit *limit;
>  };
>
> @@ -363,7 +364,8 @@ static void mtk_dpi_config_yuv422_enable(struct mtk_d=
pi *dpi, bool enable)
>
>  static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool enable)
>  {
> -       mtk_dpi_mask(dpi, DPI_CON, enable ? CSC_ENABLE : 0, CSC_ENABLE);
> +       mtk_dpi_mask(dpi, DPI_CON, enable ? dpi->conf->csc_enable_bit : 0=
,
> +                    dpi->conf->csc_enable_bit);
>  }
>
>  static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool enable)
> @@ -827,6 +829,7 @@ static const struct mtk_dpi_conf mt8173_conf =3D {
>         .hvsize_mask =3D HSIZE_MASK,
>         .channel_swap_shift =3D CH_SWAP,
>         .yuv422_en_bit =3D YUV422_EN,
> +       .csc_enable_bit =3D CSC_ENABLE,
>         .limit =3D &mtk_dpi_limit,
>  };
>
> @@ -843,6 +846,7 @@ static const struct mtk_dpi_conf mt2701_conf =3D {
>         .hvsize_mask =3D HSIZE_MASK,
>         .channel_swap_shift =3D CH_SWAP,
>         .yuv422_en_bit =3D YUV422_EN,
> +       .csc_enable_bit =3D CSC_ENABLE,
>         .limit =3D &mtk_dpi_limit,
>  };
>
> @@ -858,6 +862,7 @@ static const struct mtk_dpi_conf mt8183_conf =3D {
>         .hvsize_mask =3D HSIZE_MASK,
>         .channel_swap_shift =3D CH_SWAP,
>         .yuv422_en_bit =3D YUV422_EN,
> +       .csc_enable_bit =3D CSC_ENABLE,
>         .limit =3D &mtk_dpi_limit,
>  };
>
> @@ -873,6 +878,7 @@ static const struct mtk_dpi_conf mt8192_conf =3D {
>         .hvsize_mask =3D HSIZE_MASK,
>         .channel_swap_shift =3D CH_SWAP,
>         .yuv422_en_bit =3D YUV422_EN,
> +       .csc_enable_bit =3D CSC_ENABLE,
>         .limit =3D &mtk_dpi_limit,
>  };
>
> --
> 2.34.1
>