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Wed, 23 Feb 2022 03:49:09 +0000 Received: from DM5PR12MB1850.namprd12.prod.outlook.com ([fe80::94d8:5850:e33d:b133]) by DM5PR12MB1850.namprd12.prod.outlook.com ([fe80::94d8:5850:e33d:b133%4]) with mapi id 15.20.4995.027; Wed, 23 Feb 2022 03:49:09 +0000 From: Akhil R To: Nathan Chancellor CC: "devicetree@vger.kernel.org" , "dmaengine@vger.kernel.org" , Jonathan Hunter , Krishna Yarlagadda , Laxman Dewangan , "linux-kernel@vger.kernel.org" , "linux-tegra@vger.kernel.org" , "p.zabel@pengutronix.de" , Rajesh Gumasta , "robh+dt@kernel.org" , "thierry.reding@gmail.com" , "vkoul@kernel.org" , Pavan Kunapuli Subject: RE: [PATCH v20 2/2] dmaengine: tegra: Add tegra gpcdma driver Thread-Topic: [PATCH v20 2/2] dmaengine: tegra: Add tegra gpcdma driver Thread-Index: AQHYJzmonI6OEQo+/E6QhQV6hFw0nqyfs/OAgADMAkA= Date: Wed, 23 Feb 2022 03:49:09 +0000 Message-ID: References: <20220221153934.5226-1-akhilrajeev@nvidia.com> <20220221153934.5226-3-akhilrajeev@nvidia.com> In-Reply-To: Accept-Language: en-IN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nvidia.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM5PR12MB1850.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 69366039-8925-4b72-853d-08d9f67f7282 X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Feb 2022 03:49:09.0509 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: XvvbaOb7I4GqBkxRg18kIPqQ34u8kZ2/LpqCAcfJJB+qw9mvpO5qOY+dElWLHtrgxdj0K9V4Whsbxt7xw2effQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB2939 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > Hi Akhil, >=20 > On Mon, Feb 21, 2022 at 09:09:34PM +0530, Akhil R wrote: > > Adding GPC DMA controller driver for Tegra. The driver supports dma > > transfers between memory to memory, IO peripheral to memory and memory > > to IO peripheral. > > > > Co-developed-by: Pavan Kunapuli > > Signed-off-by: Pavan Kunapuli > > Co-developed-by: Rajesh Gumasta > > Signed-off-by: Rajesh Gumasta > > Signed-off-by: Akhil R > > Reviewed-by: Jon Hunter > > Reviewed-by: Dmitry Osipenko > > --- > > drivers/dma/Kconfig | 11 + > > drivers/dma/Makefile | 1 + > > drivers/dma/tegra186-gpc-dma.c | 1507 > > ++++++++++++++++++++++++++++++++ > > 3 files changed, 1519 insertions(+) > > create mode 100644 drivers/dma/tegra186-gpc-dma.c >=20 > >=20 > > +static const struct __maybe_unused dev_pm_ops tegra_dma_dev_pm_ops =3D > > +{ >=20 > The __maybe_unused cannot split the type ("struct dev_pm_ops") otherwise = it > causes a clang warning: >=20 > https://lore.kernel.org/r/202202221207.lQ53BwKp-lkp@intel.com/ >=20 > static const struct dev_pm_ops tegra_dma_dev_pm_ops __maybe_unused =3D { >=20 > would look a litle better I think. However, is this attribute even needed= ? The > variable is unconditionally used below, so there should be no warning abo= ut it > being unused? >=20 > Cheers, > Nathan >=20 > > + SET_SYSTEM_SLEEP_PM_OPS(tegra_dma_pm_suspend, > > +tegra_dma_pm_resume) }; > > + > > +static struct platform_driver tegra_dma_driver =3D { > > + .driver =3D { > > + .name =3D "tegra-gpcdma", > > + .pm =3D &tegra_dma_dev_pm_ops, > > + .of_match_table =3D tegra_dma_of_match, > > + }, > > + .probe =3D tegra_dma_probe, > > + .remove =3D tegra_dma_remove, > > +}; > > + > > +module_platform_driver(tegra_dma_driver); > > + > > +MODULE_DESCRIPTION("NVIDIA Tegra GPC DMA Controller driver"); > > +MODULE_AUTHOR("Pavan Kunapuli "); > > +MODULE_AUTHOR("Rajesh Gumasta "); > > +MODULE_LICENSE("GPL"); > > -- > > 2.17.1 > > > > Hi Nathan, Thanks. Will update the same. I am getting notification for the below warning also. >> drivers/dma/tegra186-gpc-dma.c:898:53: warning: shift count >=3D width o= f type [-Wshift-count-overflow] FIELD_PREP(TEGRA_GPCDMA_HIGH_ADDR_DST_PTR, (dest= >> 32)); https://lore.kernel.org/all/202202230559.bLOEMEUh-lkp@intel.com/ I suppose, this is because it is compiled against a different ARCH other th= an arm64. For arm64, the dma_addr_t is 64 bytes, and this warning does not occur. Could this be ignored for now? If not, could you suggest a fix, if possible= ? Thanks, Akhil