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"pmu_unk1") handling To: Andre Przywara Cc: Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , Rob Herring , Ondrej Jirman , Icenowy Zheng , linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Kishon Vijay Abraham I , Vinod Koul , linux-phy@lists.infradead.org References: <20220211122643.1343315-1-andre.przywara@arm.com> <20220211122643.1343315-13-andre.przywara@arm.com> From: Samuel Holland Message-ID: <40b6855b-7fac-e9bf-af9b-885d54530054@sholland.org> Date: Tue, 22 Feb 2022 21:42:15 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.6.0 MIME-Version: 1.0 In-Reply-To: <20220211122643.1343315-13-andre.przywara@arm.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/11/22 6:26 AM, Andre Przywara wrote: > As Icenowy pointed out, newer manuals (starting with H6) actually > document the register block at offset 0x800 as "HCI controller and PHY > interface", also describe the bits in our "PMU_UNK1" register. > Let's put proper names to those "unknown" variables and symbols. > > While we are at it, generalise the existing code by allowing a bitmap > of bits to clear and set, to cover newer SoCs: The A100 and H616 use a > different bit for the SIDDQ control. > > Signed-off-by: Andre Przywara Acked-by: Samuel Holland Tested-by: Samuel Holland Tested on D1, which also requires this patch.