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Wed, 23 Feb 2022 19:58:22 -0800 (PST) Received: from builder.lan ([2600:1700:a0:3dc8:3697:f6ff:fe85:aac9]) by smtp.gmail.com with ESMTPSA id s6sm912678oap.32.2022.02.23.19.58.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 19:58:21 -0800 (PST) Date: Wed, 23 Feb 2022 21:58:20 -0600 From: Bjorn Andersson To: Ansuel Smith Cc: Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Philipp Zabel , Taniya Das , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 10/16] clk: qcom: clk-rcg: add clk_rcg_floor_ops ops Message-ID: References: <20220217235703.26641-1-ansuelsmth@gmail.com> <20220217235703.26641-11-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220217235703.26641-11-ansuelsmth@gmail.com> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu 17 Feb 17:56 CST 2022, Ansuel Smith wrote: > Add clk_rcg_floor_ops for clock that can't provide a stable freq and > require to use a floor freq to provide the requested frequency. > Reviewed-by: Bjorn Andersson > Signed-off-by: Ansuel Smith > --- > drivers/clk/qcom/clk-rcg.c | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/drivers/clk/qcom/clk-rcg.c b/drivers/clk/qcom/clk-rcg.c > index a9d181d6be21..88845baa7f84 100644 > --- a/drivers/clk/qcom/clk-rcg.c > +++ b/drivers/clk/qcom/clk-rcg.c > @@ -526,6 +526,19 @@ static int clk_rcg_set_rate(struct clk_hw *hw, unsigned long rate, > return __clk_rcg_set_rate(rcg, f); > } > > +static int clk_rcg_set_floor_rate(struct clk_hw *hw, unsigned long rate, > + unsigned long parent_rate) > +{ > + struct clk_rcg *rcg = to_clk_rcg(hw); > + const struct freq_tbl *f; > + > + f = qcom_find_freq_floor(rcg->freq_tbl, rate); > + if (!f) > + return -EINVAL; > + > + return __clk_rcg_set_rate(rcg, f); > +} > + > static int clk_rcg_bypass_set_rate(struct clk_hw *hw, unsigned long rate, > unsigned long parent_rate) > { > @@ -816,6 +829,17 @@ const struct clk_ops clk_rcg_ops = { > }; > EXPORT_SYMBOL_GPL(clk_rcg_ops); > > +const struct clk_ops clk_rcg_floor_ops = { > + .enable = clk_enable_regmap, > + .disable = clk_disable_regmap, > + .get_parent = clk_rcg_get_parent, > + .set_parent = clk_rcg_set_parent, > + .recalc_rate = clk_rcg_recalc_rate, > + .determine_rate = clk_rcg_determine_rate, > + .set_rate = clk_rcg_set_floor_rate, > +}; > +EXPORT_SYMBOL_GPL(clk_rcg_floor_ops); > + > const struct clk_ops clk_rcg_bypass_ops = { > .enable = clk_enable_regmap, > .disable = clk_disable_regmap, > -- > 2.34.1 >