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Date:   Thu, 24 Feb 2022 14:40:57 +0100
From:   Vincent Whitchurch <vincent.whitchurch@axis.com>
To:     Denis Kirjanov <dkirjanov@suse.de>
CC:     Giuseppe Cavallaro <peppe.cavallaro@st.com>,
        Alexandre Torgue <alexandre.torgue@foss.st.com>,
        Jose Abreu <joabreu@synopsys.com>,
        "David S. Miller" <davem@davemloft.net>,
        Jakub Kicinski <kuba@kernel.org>,
        Maxime Coquelin <mcoquelin.stm32@gmail.com>,
        kernel <kernel@axis.com>, Lars Persson <Lars.Persson@axis.com>,
        Srinivas Kandagatla <srinivas.kandagatla@st.com>,
        "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
        "linux-stm32@st-md-mailman.stormreply.com" 
        <linux-stm32@st-md-mailman.stormreply.com>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2] net: stmmac: only enable DMA interrupts when ready
Message-ID: <20220224134057.GA4994@axis.com>
References: <20220224113829.1092859-1-vincent.whitchurch@axis.com>
 <f62148d7-6f7a-3557-e3ca-3a261b61ac9d@suse.de>
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On Thu, Feb 24, 2022 at 01:53:33PM +0100, Denis Kirjanov wrote:
> 2/24/22 14:38, Vincent Whitchurch пишет:
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> > index 6708ca2aa4f7..43978558d6c0 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> > +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> > @@ -2260,6 +2260,23 @@ static void stmmac_stop_tx_dma(struct stmmac_priv *priv, u32 chan)
> >   	stmmac_stop_tx(priv, priv->ioaddr, chan);
> >   }
> >   
> > +static void stmmac_enable_all_dma_irq(struct stmmac_priv *priv)
> > +{
> > +	u32 rx_channels_count = priv->plat->rx_queues_to_use;
> > +	u32 tx_channels_count = priv->plat->tx_queues_to_use;
> > +	u32 dma_csr_ch = max(rx_channels_count, tx_channels_count);
> > +	u32 chan;
> > +
> > +	for (chan = 0; chan < dma_csr_ch; chan++) {
> > +		struct stmmac_channel *ch = &priv->channel[chan];
> > +		unsigned long flags;
> > +
> > +		spin_lock_irqsave(&ch->lock, flags);
> > +		stmmac_enable_dma_irq(priv, priv->ioaddr, chan, 1, 1);
> > +		spin_unlock_irqrestore(&ch->lock, flags);
> > +	}
> > +}
> > +
> >   /**
> >    * stmmac_start_all_dma - start all RX and TX DMA channels
> >    * @priv: driver private structure
> > @@ -2902,8 +2919,10 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv)
> >   		stmmac_axi(priv, priv->ioaddr, priv->plat->axi);
> >   
> >   	/* DMA CSR Channel configuration */
> > -	for (chan = 0; chan < dma_csr_ch; chan++)
> > +	for (chan = 0; chan < dma_csr_ch; chan++) {
> >   		stmmac_init_chan(priv, priv->ioaddr, priv->plat->dma_cfg, chan);
> Did you miss to take a channel lock?

I didn't add it on purpose.  At this point during initialization there
is no-one who can race with the register write in
stmmac_disable_dma_irq().  The call to stmmac_init_chan() (in the
existing code) writes the same register without the lock. 

> > +		stmmac_disable_dma_irq(priv, priv->ioaddr, chan, 1, 1);
> > +	}
> >