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[2620:137:e000::1:20]) by mx.google.com with ESMTP id d1si2790415pgm.782.2022.02.24.09.58.17; Thu, 24 Feb 2022 09:58:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20210112 header.b=ciEhdzZf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231845AbiBXR2Q (ORCPT + 99 others); Thu, 24 Feb 2022 12:28:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41176 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231754AbiBXR1L (ORCPT ); Thu, 24 Feb 2022 12:27:11 -0500 Received: from mail-pj1-x1049.google.com (mail-pj1-x1049.google.com [IPv6:2607:f8b0:4864:20::1049]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 70AE9278CB7 for ; Thu, 24 Feb 2022 09:26:24 -0800 (PST) Received: by mail-pj1-x1049.google.com with SMTP id y1-20020a17090a644100b001bc901aba0dso1607246pjm.8 for ; Thu, 24 Feb 2022 09:26:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=0wDRpcCunfnn6jCq2Avo69TvJ8i4x6eSnCJLc/mO0iE=; b=ciEhdzZf28FOJSjBalS1IXNdMFbY6mvXPtNTSgACZqBzz53Fw5WS+3q7RMKXXr0e6f Yze4Oiywc8kMCpD1QhLgqXFtFk6jSdqVP9eKRBsXSKO5b1OYcJ2rqZb6pS78RrqiV2rj SSswk2sH09OAW1GYjO44B1cM8+1dTNx7Rxheuih2CHf8M8ETwuK0boZnjK2Z0aExSuw0 Rp0qyU7BMMoMsl7YlYBpOFaR8OWovgakrwllhYAnPu/fwwP+JLAIQ8F+F8on+FcdPGzN Pew7kD00APKcrjSXCaLpU+b37D4YcYibmne+3dmu7tB3E7w0NqBBIytvwvkUs/1MuZ8+ jEwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=0wDRpcCunfnn6jCq2Avo69TvJ8i4x6eSnCJLc/mO0iE=; b=iTbuMQzduBP8ylaMgWmaZusapSw+2vORPt7kiCzRvo37RWVEE9xxQ3Sj44K3CFhVlS AONx21R9L6n9QXzaSbsozbhpG6J95bIZ2sTSwn6cnAtumtfUQH/bf2T/6d9k/5X2cFt+ 9lB24wYbVXq+R8JEjBbfSlDBMBIQ31bVNj1bYv5nXmo3pJRqxKW6ejdGuW1hYm7TIqgW wZAsZ8HJQteD1A7zdVoWFWeteKEWL9ckQ/g7O14L+zogurM3nU/5Dd1fUHwfBOnwK/0G LsBvu+KhTJm3Yld6OxPIuEzSJ6N9pyoRgjj/AI5Eiwz2iC3imNpzDnX1YZhbffc3qcSt Gz9g== X-Gm-Message-State: AOAM533iEcwj4ta89Dc4HgpOB6v8+tppexM5WHluOA87uy95I1Oy8pYk SWwE4Q6qo+UhWJmaKUaXno9riajKknfR X-Received: from rananta-virt.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:1bcc]) (user=rananta job=sendgmr) by 2002:a05:6a00:1f08:b0:4c6:eb85:be8c with SMTP id be8-20020a056a001f0800b004c6eb85be8cmr3806765pfb.62.1645723583919; Thu, 24 Feb 2022 09:26:23 -0800 (PST) Date: Thu, 24 Feb 2022 17:25:53 +0000 In-Reply-To: <20220224172559.4170192-1-rananta@google.com> Message-Id: <20220224172559.4170192-8-rananta@google.com> Mime-Version: 1.0 References: <20220224172559.4170192-1-rananta@google.com> X-Mailer: git-send-email 2.35.1.574.g5d30c73bfb-goog Subject: [PATCH v4 07/13] KVM: arm64: Add vendor hypervisor firmware register From: Raghavendra Rao Ananta To: Marc Zyngier , Andrew Jones , James Morse , Alexandru Elisei , Suzuki K Poulose Cc: Paolo Bonzini , Catalin Marinas , Will Deacon , Peter Shier , Ricardo Koller , Oliver Upton , Reiji Watanabe , Jing Zhang , Raghavendra Rao Anata , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Introduce the firmware register to hold the vendor specific hypervisor service calls (owner value 6) as a bitmap. The bitmap represents the features that'll be enabled for the guest, as configured by the user-space. Currently, this includes support only for Precision Time Protocol (PTP), represented by bit-0. The register is also added to the kvm_arm_vm_scope_fw_regs[] list as it maintains its state per-VM. Signed-off-by: Raghavendra Rao Ananta --- arch/arm64/include/asm/kvm_host.h | 2 ++ arch/arm64/include/uapi/asm/kvm.h | 4 ++++ arch/arm64/kvm/guest.c | 1 + arch/arm64/kvm/hypercalls.c | 22 +++++++++++++++++++++- include/kvm/arm_hypercalls.h | 3 +++ 5 files changed, 31 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 318148b69279..d999456c4604 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -106,10 +106,12 @@ struct kvm_arch_memory_slot { * * @hvc_std_bmap: Bitmap of standard secure service calls * @hvc_std_hyp_bmap: Bitmap of standard hypervisor service calls + * @hvc_vendor_hyp_bmap: Bitmap of vendor specific hypervisor service calls */ struct kvm_hvc_desc { u64 hvc_std_bmap; u64 hvc_std_hyp_bmap; + u64 hvc_vendor_hyp_bmap; }; struct kvm_arch { diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h index 9a2caead7359..ed470bde13d8 100644 --- a/arch/arm64/include/uapi/asm/kvm.h +++ b/arch/arm64/include/uapi/asm/kvm.h @@ -299,6 +299,10 @@ struct kvm_arm_copy_mte_tags { #define KVM_REG_ARM_STD_HYP_BIT_PV_TIME BIT(0) #define KVM_REG_ARM_STD_HYP_BMAP_BIT_MAX 0 /* Last valid bit */ +#define KVM_REG_ARM_VENDOR_HYP_BMAP KVM_REG_ARM_FW_BMAP_REG(2) +#define KVM_REG_ARM_VENDOR_HYP_BIT_PTP BIT(0) +#define KVM_REG_ARM_VENDOR_HYP_BMAP_BIT_MAX 0 /* Last valid bit */ + /* SVE registers */ #define KVM_REG_ARM64_SVE (0x15 << KVM_REG_ARM_COPROC_SHIFT) diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c index c42426d6137e..fc3656f91aed 100644 --- a/arch/arm64/kvm/guest.c +++ b/arch/arm64/kvm/guest.c @@ -67,6 +67,7 @@ static const u64 kvm_arm_vm_scope_fw_regs[] = { KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2, KVM_REG_ARM_STD_BMAP, KVM_REG_ARM_STD_HYP_BMAP, + KVM_REG_ARM_VENDOR_HYP_BMAP, }; /** diff --git a/arch/arm64/kvm/hypercalls.c b/arch/arm64/kvm/hypercalls.c index ebc0cc26cf2e..5c5098c8f1f9 100644 --- a/arch/arm64/kvm/hypercalls.c +++ b/arch/arm64/kvm/hypercalls.c @@ -79,6 +79,9 @@ static bool kvm_hvc_call_supported(struct kvm_vcpu *vcpu, u32 func_id) case ARM_SMCCC_HV_PV_TIME_ST: return kvm_arm_fw_reg_feat_enabled(hvc_desc->hvc_std_hyp_bmap, KVM_REG_ARM_STD_HYP_BIT_PV_TIME); + case ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID: + return kvm_arm_fw_reg_feat_enabled(hvc_desc->hvc_vendor_hyp_bmap, + KVM_REG_ARM_VENDOR_HYP_BIT_PTP); default: /* By default, allow the services that aren't listed here */ return true; @@ -162,7 +165,14 @@ int kvm_hvc_call_handler(struct kvm_vcpu *vcpu) break; case ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID: val[0] = BIT(ARM_SMCCC_KVM_FUNC_FEATURES); - val[0] |= BIT(ARM_SMCCC_KVM_FUNC_PTP); + + /* + * The feature bits exposed to user-space doesn't include + * ARM_SMCCC_KVM_FUNC_FEATURES. However, we expose this to + * the guest as bit-0. Hence, left-shift the user-space + * exposed bitmap by 1 to accommodate this. + */ + val[0] |= hvc_desc->hvc_vendor_hyp_bmap << 1; break; case ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID: kvm_ptp_get_time(vcpu, val); @@ -188,6 +198,7 @@ static const u64 kvm_arm_fw_reg_ids[] = { KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2, KVM_REG_ARM_STD_BMAP, KVM_REG_ARM_STD_HYP_BMAP, + KVM_REG_ARM_VENDOR_HYP_BMAP, }; void kvm_arm_init_hypercalls(struct kvm *kvm) @@ -196,6 +207,7 @@ void kvm_arm_init_hypercalls(struct kvm *kvm) hvc_desc->hvc_std_bmap = ARM_SMCCC_STD_FEATURES; hvc_desc->hvc_std_hyp_bmap = ARM_SMCCC_STD_HYP_FEATURES; + hvc_desc->hvc_vendor_hyp_bmap = ARM_SMCCC_VENDOR_HYP_FEATURES; } int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu) @@ -285,6 +297,9 @@ int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) case KVM_REG_ARM_STD_HYP_BMAP: val = READ_ONCE(hvc_desc->hvc_std_hyp_bmap); break; + case KVM_REG_ARM_VENDOR_HYP_BMAP: + val = READ_ONCE(hvc_desc->hvc_vendor_hyp_bmap); + break; default: return -ENOENT; } @@ -311,6 +326,10 @@ static int kvm_arm_set_fw_reg_bmap(struct kvm_vcpu *vcpu, u64 reg_id, u64 val) fw_reg_bmap = &hvc_desc->hvc_std_hyp_bmap; fw_reg_features = ARM_SMCCC_STD_HYP_FEATURES; break; + case KVM_REG_ARM_VENDOR_HYP_BMAP: + fw_reg_bmap = &hvc_desc->hvc_vendor_hyp_bmap; + fw_reg_features = ARM_SMCCC_VENDOR_HYP_FEATURES; + break; default: return -ENOENT; } @@ -416,6 +435,7 @@ int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) return 0; case KVM_REG_ARM_STD_BMAP: case KVM_REG_ARM_STD_HYP_BMAP: + case KVM_REG_ARM_VENDOR_HYP_BMAP: return kvm_arm_set_fw_reg_bmap(vcpu, reg_id, val); default: return -ENOENT; diff --git a/include/kvm/arm_hypercalls.h b/include/kvm/arm_hypercalls.h index a1cb6e839c74..91be758ca58e 100644 --- a/include/kvm/arm_hypercalls.h +++ b/include/kvm/arm_hypercalls.h @@ -12,6 +12,9 @@ #define ARM_SMCCC_STD_HYP_FEATURES \ GENMASK_ULL(KVM_REG_ARM_STD_HYP_BMAP_BIT_MAX, 0) +#define ARM_SMCCC_VENDOR_HYP_FEATURES \ + GENMASK_ULL(KVM_REG_ARM_VENDOR_HYP_BMAP_BIT_MAX, 0) + int kvm_hvc_call_handler(struct kvm_vcpu *vcpu); static inline u32 smccc_get_function(struct kvm_vcpu *vcpu) -- 2.35.1.473.g83b2b277ed-goog