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[198.145.64.163]) by smtp.gmail.com with ESMTPSA id a15-20020a637f0f000000b00372e075b2efsm622127pgd.30.2022.02.24.16.35.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Feb 2022 16:35:52 -0800 (PST) Date: Thu, 24 Feb 2022 16:35:51 -0800 From: Kees Cook To: Peter Zijlstra Cc: x86@kernel.org, joao@overdrivepizza.com, hjl.tools@gmail.com, jpoimboe@redhat.com, andrew.cooper3@citrix.com, linux-kernel@vger.kernel.org, ndesaulniers@google.com, samitolvanen@google.com, mark.rutland@arm.com, alyssa.milburn@intel.com, mbenes@suse.cz, rostedt@goodmis.org, mhiramat@kernel.org, alexei.starovoitov@gmail.com, Nathan Chancellor , llvm@lists.linux.dev Subject: Re: [PATCH v2 05/39] x86: Base IBT bits Message-ID: <202202241627.EEF3D5D2@keescook> References: <20220224145138.952963315@infradead.org> <20220224151322.307406918@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220224151322.307406918@infradead.org> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Feb 24, 2022 at 03:51:43PM +0100, Peter Zijlstra wrote: > Add Kconfig, Makefile and basic instruction support for x86 IBT. > > XXX clang is not playing ball, probably lld being 'funny', I'm having > problems with .plt entries appearing all over after linking. I'll try to look into this; I know you've been chatting with Nathan about it. Is there an open bug for it? (And any kind of reproducer smaller than a 39 patch series we can show the linker folks?) :) > [...] > +config X86_KERNEL_IBT > + prompt "Indirect Branch Tracking" > + bool > + depends on X86_64 && CC_HAS_IBT > + help > + Build the kernel with support for Indirect Branch Tracking, a > + hardware supported CFI scheme. Any indirect call must land on hardware support course-grain forward-edge Control Flow Integrity protection. It enforces that all indirect calls must land on > + an ENDBR instruction, as such, the compiler will litter the > + code with them to make this happen. "litter the code" -> "instrument the machine code". > + > config X86_INTEL_MEMORY_PROTECTION_KEYS > prompt "Memory Protection Keys" > def_bool y > --- a/arch/x86/Makefile > +++ b/arch/x86/Makefile > @@ -36,7 +36,7 @@ endif > > # How to compile the 16-bit code. Note we always compile for -march=i386; > # that way we can complain to the user if the CPU is insufficient. > -REALMODE_CFLAGS := -m16 -g -Os -DDISABLE_BRANCH_PROFILING \ > +REALMODE_CFLAGS := -m16 -g -Os -DDISABLE_BRANCH_PROFILING -D__DISABLE_EXPORTS \ > -Wall -Wstrict-prototypes -march=i386 -mregparm=3 \ > -fno-strict-aliasing -fomit-frame-pointer -fno-pic \ > -mno-mmx -mno-sse $(call cc-option,-fcf-protection=none) This change seems important separately from this patch, yes? (Or at least a specific call-out in the commit log.) Otherwise, looks good. -- Kees Cook