Received: by 2002:a05:6a10:9afc:0:0:0:0 with SMTP id t28csp366817pxm; Fri, 25 Feb 2022 09:28:37 -0800 (PST) X-Google-Smtp-Source: ABdhPJwRWuxJ0+lxBuUc7PxfHAkvuejThfXH4kv6qNR8mLblqR9If9BrRVh/TvT99DHFH3h1sGad X-Received: by 2002:a17:90a:f48f:b0:1bc:2521:fb0a with SMTP id bx15-20020a17090af48f00b001bc2521fb0amr4203709pjb.48.1645810117461; Fri, 25 Feb 2022 09:28:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1645810117; cv=none; d=google.com; s=arc-20160816; b=Duhh966W+gx04MNwTo3uuWGK5H6BW0JVkN1ZcBdbg1dvmUnaeHScJ7hFKFxAKHhNX9 yGdy96zW6AdvHPk08GlQE3F+0FPYnMChV0RiCVLNB91yGs/1tFHU1H9dWcrkRwFbZR4q K6Zhclc9s8CK3Cg7COSiyj4/cop6Nsdt4UG9Y3jg2wgVlcbJKGhce2IhoqACxysFiUPd UM3eocsKhtw/FZYIkTy4+yUOsJcPTpK6LkPjxeqdDbFSJuAeV384klxgbcdFDnt64Fti xVZA+0aRSEJbJxjvX7nE6PWpWm2NKF89bRNCBIvA7p/Z6fHiaQoxq92F52DfQVoZeE/N UMPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:user-agent:in-reply-to:content-transfer-encoding :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:dkim-signature; bh=MGua2yqQzt80MmzHNbITsN72dxcCcwki2lWx8Puzm+I=; b=Jw2q1+mKImu2Rl7m+wolEteqL/Ng7KlqiZxBbs8NnVMHRsZgeq/HJYsg0eyryGPQSq Zj6/4Ssu7F+cNtlQTdEFCVY8qyh3Oya8pa63HPScYL5yOaZsMvOpdHHmgw2YjOciPjsx tdxuRTR8bBJLgfBlyPD1EohXCnRiA+vCoMCdcE8+BY+RzqYwzPZgjx8dFcUYr41ZViZ0 baucy7/5sLQ/6ePR0mOA4gQDq4H8pgjT+3dS+AlExCqHoez6YSEIovZ0oJRqTWU6vrHB O2g6SIHsTbGyFUR2w5M6Ntxe4oVrKYvG7TSGZ41tGxQaJGi5/O/7OupkDMzew44spmik sR/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=g43ZGUP1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id mh8-20020a17090b4ac800b001b8fedf2932si2887671pjb.89.2022.02.25.09.28.15; Fri, 25 Feb 2022 09:28:37 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=g43ZGUP1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240650AbiBYMb3 (ORCPT + 99 others); Fri, 25 Feb 2022 07:31:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48330 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234513AbiBYMb1 (ORCPT ); Fri, 25 Feb 2022 07:31:27 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D9F7A214FBA; Fri, 25 Feb 2022 04:30:55 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 77CFC61B1D; Fri, 25 Feb 2022 12:30:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8B157C340E7; Fri, 25 Feb 2022 12:30:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645792254; bh=NYB7W5hUbS2zZedM+oLWCNkYlxgEa7XFe2VF9aAqvWM=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=g43ZGUP1Q3iGRy55LTmE+I++1QLpUhHIEL+ZzdT2ql3v22SwDeUFf/lm8JintNN/E 8o+OaYJJNdGOugjf92a8nT3Chbs9Mc4C1JZSyFzg7Pfg9fC/fjRQtQK1j1iB+M9ELt RmdewUgoBrZjGBW/XxvLUSGUpSAV+TyoGlF43HCP52B9Fv7RNOujK9qtgHZQdqsJMP P9p1ljcpnrFZ06o0j7iENIkfNd8HYwdtkrQYKRqTB+0E4ZSWFaaqIWfx6LrJ3C2jRL Am2brfc+e5DP0idzWUX5lEV0lWrT052PNQ4yVkiSoFhnuoGxcNIAh5FoYAoiRYpN/J k8rCO7BKm2Enw== Received: by pali.im (Postfix) id A5B1C7EF; Fri, 25 Feb 2022 13:30:51 +0100 (CET) Date: Fri, 25 Feb 2022 13:30:51 +0100 From: Pali =?utf-8?B?Um9ow6Fy?= To: Bjorn Helgaas Cc: Lorenzo Pieralisi , Bjorn Helgaas , Rob Herring , Andrew Lunn , Thomas Petazzoni , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Marek =?utf-8?B?QmVow7pu?= , Russell King , Gregory Clement , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 4/6] PCI: Add function for parsing 'slot-power-limit-milliwatt' DT property Message-ID: <20220225123051.xlsv7fkesdf5upeh@pali> References: <20220222163158.1666-5-pali@kernel.org> <20220224204715.GA291889@bhelgaas> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20220224204715.GA291889@bhelgaas> User-Agent: NeoMutt/20180716 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thursday 24 February 2022 14:47:15 Bjorn Helgaas wrote: > On Tue, Feb 22, 2022 at 05:31:56PM +0100, Pali Rohár wrote: > > Add function of_pci_get_slot_power_limit(), which parses the > > 'slot-power-limit-milliwatt' DT property, returning the value in > > milliwatts and in format ready for the PCIe Slot Capabilities Register. > > > > Signed-off-by: Pali Rohár > > Signed-off-by: Marek Behún > > Reviewed-by: Rob Herring > > Acked-by: Bjorn Helgaas > > --- > > drivers/pci/of.c | 64 +++++++++++++++++++++++++++++++++++++++++++++++ > > drivers/pci/pci.h | 15 +++++++++++ > > 2 files changed, 79 insertions(+) > > > > diff --git a/drivers/pci/of.c b/drivers/pci/of.c > > index cb2e8351c2cc..2b0c0a3641a8 100644 > > --- a/drivers/pci/of.c > > +++ b/drivers/pci/of.c > > @@ -633,3 +633,67 @@ int of_pci_get_max_link_speed(struct device_node *node) > > return max_link_speed; > > } > > EXPORT_SYMBOL_GPL(of_pci_get_max_link_speed); > > + > > +/** > > + * of_pci_get_slot_power_limit - Parses the "slot-power-limit-milliwatt" > > + * property. > > + * > > + * @node: device tree node with the slot power limit information > > + * @slot_power_limit_value: pointer where the value should be stored in PCIe > > + * Slot Capabilities Register format > > + * @slot_power_limit_scale: pointer where the scale should be stored in PCIe > > + * Slot Capabilities Register format > > + * > > + * Returns the slot power limit in milliwatts and if @slot_power_limit_value > > + * and @slot_power_limit_scale pointers are non-NULL, fills in the value and > > + * scale in format used by PCIe Slot Capabilities Register. > > + * > > + * If the property is not found or is invalid, returns 0. > > + */ > > +u32 of_pci_get_slot_power_limit(struct device_node *node, > > + u8 *slot_power_limit_value, > > + u8 *slot_power_limit_scale) > > +{ > > + u32 slot_power_limit; > > Including "mw" or similar reference to the units would give a hint of > how to relate the code to the spec. > > > + u8 value, scale; > > + > > + if (of_property_read_u32(node, "slot-power-limit-milliwatt", > > + &slot_power_limit)) > > + slot_power_limit = 0; > > + > > + /* Calculate Slot Power Limit Value and Slot Power Limit Scale */ > > Add a spec reference to PCIe r6.0, sec 7.5.3.9. IIUC, this supports > up to 300W, which was what r5.0 defined, but r6.0 added values up to > 0xfe (600W). I did not know about it and I have not seen/read r6.0. It would be nice if somebody with access to r6.0 send a patch to lspci utility, so we could write support for 600W based on lspci parser. > > + if (slot_power_limit == 0) { > > + value = 0x00; > > + scale = 0; > > + } else if (slot_power_limit <= 255) { > > + value = slot_power_limit; > > + scale = 3; > > + } else if (slot_power_limit <= 255*10) { > > + value = slot_power_limit / 10; > > + scale = 2; > > + } else if (slot_power_limit <= 255*100) { > > + value = slot_power_limit / 100; > > + scale = 1; > > + } else if (slot_power_limit <= 239*1000) { > > + value = slot_power_limit / 1000; > > + scale = 0; > > + } else if (slot_power_limit <= 250*1000) { > > + value = 0xF0; > > + scale = 0; > > + } else if (slot_power_limit <= 275*1000) { > > + value = 0xF1; > > + scale = 0; > > + } else { > > + value = 0xF2; > > + scale = 0; > > + } > > + > > + if (slot_power_limit_value) > > + *slot_power_limit_value = value; > > + > > + if (slot_power_limit_scale) > > + *slot_power_limit_scale = scale; > > + > > + return slot_power_limit; > > If "slot-power-limit-milliwatt" contains a value larger than can be > represented in "value" and "scale", the return value will not agree > with value/scale, will it? In previous version 0xF2 was reserved for values above 275 W. So for me it looked like a correct solution. > Currently you only use the return value for a log message, so no real > harm yet, other than the fact that we might print "Slot power limit > 1000.0W" when the hardware will only advertise 600W available. > > Also, if "slot-power-limit-milliwatt" contains something like > 260000 mW (260 W), we'll return 0xF1/0, so the hardware will > advertise 275 W available. There is no way how to encode 260 W. It is possible only 250 W or 275 W, and nothing between. I chose to round value to upper limit. What do you prefer in these cases? Upper or lower limit? > > +} > > +EXPORT_SYMBOL_GPL(of_pci_get_slot_power_limit); > > diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h > > index 3d60cabde1a1..e10cdec6c56e 100644 > > --- a/drivers/pci/pci.h > > +++ b/drivers/pci/pci.h > > @@ -627,6 +627,9 @@ struct device_node; > > int of_pci_parse_bus_range(struct device_node *node, struct resource *res); > > int of_get_pci_domain_nr(struct device_node *node); > > int of_pci_get_max_link_speed(struct device_node *node); > > +u32 of_pci_get_slot_power_limit(struct device_node *node, > > + u8 *slot_power_limit_value, > > + u8 *slot_power_limit_scale); > > void pci_set_of_node(struct pci_dev *dev); > > void pci_release_of_node(struct pci_dev *dev); > > void pci_set_bus_of_node(struct pci_bus *bus); > > @@ -653,6 +656,18 @@ of_pci_get_max_link_speed(struct device_node *node) > > return -EINVAL; > > } > > > > +static inline u32 > > +of_pci_get_slot_power_limit(struct device_node *node, > > + u8 *slot_power_limit_value, > > + u8 *slot_power_limit_scale) > > +{ > > + if (slot_power_limit_value) > > + *slot_power_limit_value = 0; > > + if (slot_power_limit_scale) > > + *slot_power_limit_scale = 0; > > + return 0; > > +} > > + > > static inline void pci_set_of_node(struct pci_dev *dev) { } > > static inline void pci_release_of_node(struct pci_dev *dev) { } > > static inline void pci_set_bus_of_node(struct pci_bus *bus) { } > > -- > > 2.20.1 > >