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Message-ID: <35276e1e-e37c-f8e7-c452-799f8e778465@ti.com>
Date:   Mon, 28 Feb 2022 14:52:23 +0530
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Subject: Re: [PATCH] dmaengine: ti: k3-udma: Avoid false error msg on chan
 teardown
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To:     =?UTF-8?Q?P=c3=a9ter_Ujfalusi?= <peter.ujfalusi@gmail.com>,
        Vinod Koul <vkoul@kernel.org>
CC:     <dmaengine@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        Linux ARM Mailing List <linux-arm-kernel@lists.infradead.org>,
        Jayesh Choudhary <j-choudhary@ti.com>
References: <20220215044112.161634-1-vigneshr@ti.com>
 <58fe0934-4853-714c-600d-9a2d86df5bc8@gmail.com>
From:   Vignesh Raghavendra <vigneshr@ti.com>
In-Reply-To: <58fe0934-4853-714c-600d-9a2d86df5bc8@gmail.com>
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Hi Peter,

On 21/02/22 1:42 am, Péter Ujfalusi wrote:
> Hi Vignesh,
> 
> On 15/02/2022 06:41, Vignesh Raghavendra wrote:
>> In cyclic mode, there is no additional descriptor pushed to collect
>> outstanding data on channel teardown. Therefore no need to wait for this
>> descriptor to come back.
>>
>> Without this terminating aplay cmd outputs false error msg like:
>> [  116.402800] ti-bcdma 485c0100.dma-controller: chan1 teardown timeout!
> 
> are you sure it is aplay? It is MEM_TO_DEV, we only use the flush
> descriptor for DEV_TO_MEM. MEM_TO_DEV can 'disconnect' from the
> peripheral to flush out the FIFO.
> 

Yes, this is with aplay. You are right that MEM_TO_DEV should have
worked w/o this patch.


> I have not seen this on am654, j721e. I can not recall seeing this on
> the capture side either.
> 

I dont see it either

> The cyclic TR should be able to drain the DEV_TO_MEM by itself and the
> TR should terminate.
> 

You are right. There seems to be a trobule with McASP + BCDMA on AM62
which needs more investigation. I see

 RT c0000000 peer RT 90000000
 BCNT 5dc00, peer BCNT 46400

So there is some data stuck in pipe which prevents channel from
disabling and TDCM being signaled. My guess is McASP is no longer
requesting more data from PDMA. Any way to look at McASP FIFO state/ DMA
req enable state? Wondering what else can prevent draining of data.

One difference is that AM62 has ti,tlv320aic3106 codec (codec is the
master) where J7 uses PCM.

Regards
Vignesh


> 
>> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
>> ---
>>  drivers/dma/ti/k3-udma.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
>> index 9abb08d353ca0..c9a1b2f312603 100644
>> --- a/drivers/dma/ti/k3-udma.c
>> +++ b/drivers/dma/ti/k3-udma.c
>> @@ -3924,7 +3924,7 @@ static void udma_synchronize(struct dma_chan *chan)
>>  
>>  	vchan_synchronize(&uc->vc);
>>  
>> -	if (uc->state == UDMA_CHAN_IS_TERMINATING) {
>> +	if (uc->state == UDMA_CHAN_IS_TERMINATING && !uc->cyclic) {
>>  		timeout = wait_for_completion_timeout(&uc->teardown_completed,
>>  						      timeout);
>>  		if (!timeout) {
>